[hpc-announce] CORRECTNESS Workshop at SC26 — Call for Papers

[Cindy Rubio González]

Apologies if you receive multiple copies of this email!

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                            CALL FOR PAPERS

     10th International Workshop on Software Correctness for HPC

                  Applications (Correctness 2026)

    In conjunction with SC26: The International Conference for High

  Performance Computing, Networking, Storage and Analysis, November

   2026, Chicago, IL, USA. In cooperation with IEEE Computer Society.

               https://urldefense.us/v3/__https://correctness-workshop.github.io/2026/__;!!G_uCfscf7eWS!dorf8pKobwZNm9cHxftNl1BeJEs5TkrNWD2p2H1xiP2ce2XRH5kn-ovvybwWlQnX862hv2LU5V4Bqk268rBMGo9ptg$ 

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Dates

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Paper submissions due: July 23rd, 2026

Notification of acceptance: September 1st, 2026

Camera-ready papers due: TBD

Scope

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Ensuring correctness in high-performance computing (HPC) applications

is one of the fundamental challenges that the HPC community faces

today. While significant advances in verification, testing, and

debugging have been made to isolate software errors (or defects) in the

context of non-HPC software, several factors make achieving correctness

in HPC applications and systems much more challenging than in general

systems software: growing heterogeneity (architectures with CPUs, GPUs,

and special purpose accelerators), massive scale computations (very

high degree of concurrency), use of combined parallel programing models

(e.g., MPI+X), new scalable numerical algorithms (e.g., to leverage

reduced precision in floating-point arithmetic), and aggressive

compiler optimizations/transformations are some of the challenges that

make correctness harder in HPC. The following DOE report lays out the key

challenges and research areas of HPC correctness:

https://urldefense.us/v3/__https://doi.org/10.2172/1470989__;!!G_uCfscf7eWS!dorf8pKobwZNm9cHxftNl1BeJEs5TkrNWD2p2H1xiP2ce2XRH5kn-ovvybwWlQnX862hv2LU5V4Bqk268rDPV4Cfig$ 

As the complexity of future architectures, algorithms, and applications

in HPC increases, the ability to fully exploit exascale systems will be

limited without correctness. With the continuous use of HPC software to

advance scientific and technological capabilities, novel techniques and

practical tools for software correctness in HPC are invaluable.

The goal of the Correctness Workshop is to bring together researchers

and developers to present and discuss novel ideas to address the

problem of correctness in HPC. The workshop will feature contributed

papers and invited talks in this area.

Topics

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Topics of interest include, but are not limited to:

* Formal methods and rigorous mathematical techniques for correctness in
HPC Applications

* Program synthesis techniques for testing and debugging HPC applications

* Frameworks to address the challenges of testing complex HPC applications

(e.g., multiphysics applications)

* Approaches for the specification of numerical algorithms with the
goal of correctness
checking

* Error identification in the design and implementation of numerical
algorithms using finite-precision floating point numbers

* Tools to control the effect of non-determinism when debugging and testing
HPC software

* Scalable debugging solutions for large-scale HPC applications

* Scalable tools for model checking, verification, certification, or
symbolic execution

* Static and dynamic analysis to test and check correctness in the entire
HPC software ecosystem

* Predictive debugging and testing approaches to forecast the
occurrence of errors
in specific conditions

* Machine learning and anomaly detection for bug detection and localization

* Correctness in emerging HPC programming models

* Analysis of software error propagation and error handling in HPC runtime

systems and libraries

* Metrics to measure the degree of correctness of HPC software

* Specifications to check the correctness of runtime systems

* Large databases of bug reports and/or reproducible test cases of HPC
software

* Benchmarks to test the effectiveness of HPC correctness tools

Proceedings

===========

We expect that the proceedings will be archived in IEEE Xplore via the IEEE
Computer Society.

Submissions and Format

======================

Authors are invited to submit manuscripts in English structured as
technical or experience papers in any of these categories: (a) regular
papers: with a length of at least 7 pages, not exceeding 8 pages of
content, including everything except for references; (b) short papers: with
a length of 4 pages, including everything except for references.

Organizers

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Ignacio Laguna, LLNL

Cindy Rubio-González, UC Davis

Contact

=======

Please address workshop questions to Ignacio Laguna (ilaguna at llnl.gov)

and/or Cindy Rubio-González (crubio at ucdavis.edu).


-- 
Cindy Rubio González
Professor of Computer Science
University of California, Davis
https://urldefense.us/v3/__http://web.cs.ucdavis.edu/*rubio/__;fg!!G_uCfscf7eWS!dorf8pKobwZNm9cHxftNl1BeJEs5TkrNWD2p2H1xiP2ce2XRH5kn-ovvybwWlQnX862hv2LU5V4Bqk268rB4AK9OCQ$