[hpc-announce] Call for Papers: 3rd Workshop on Programming Models for SIMD/Vector Processing (WPMVP 2016)
jan.eitzinger at fau.de
Tue Oct 27 04:06:12 CDT 2015
WPMVP 2016: 3rd Workshop on Programming Models for SIMD/Vector Processing
In conjunction with the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2016)
Barcelona, Spain, March 12-16, 2016
Fri 13 Nov 2015: Paper submission deadline
Mon 14 Dec 2015: Notification of acceptance
Mon 25 Jan 2016: Camera-ready copies due
SIMD processing is currently a main driver of performance in general purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be explicitly utilised by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and ispc are just examples for many choices available. Additionally, established optimising compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions.
The purpose of this workshop is to bring together practitioners and researchers from academia and industry to discuss issues, solutions, and opportunities in enabling application developers to effectively exploit SIMD/vector processing in modern processors. We seek submissions that cover all aspects of SIMD/vector processing. Topics of interests include, but are not restricted to:
• Programming models for SIMD/vector processing
• C/C++/Fortran extensions for SIMD (e.g., OpenMP, OpenACC, OpenCL, SIMD intrinsics)
• New data parallel or streaming programming models for SIMD
• Exploitation of SIMD/vector in Java, scripting languages, and domain-specific languages
• Compilers & tools to discover and optimize SIMD parallelism
• Case study, experience report, and performance analysis of SIMD/vector applications
Call for Papers:
Submitted papers must be no more than 8 pages in length. Authors are encouraged to use the ACM two-column format (http://www.sigplan.org/authorInformation.htm). Papers should be submitted in PDF format and should be legible when printed on a black-and-white printer. Each submission will receive at least three reviews from the technical program committee. Selected submissions will be invited to present at the workshop and be published in the workshop proceedings. Accepted papers will be published in the ACM digital library after the workshop.
We especially encourage students to submit papers. There will be a special PPoPP 2016 student travel grant award which you can apply for.
Authors must register and submit the paper through the online submission system at https://easychair.org/conferences/?conf=wpmvp2016. If you have problems accessing the system, e-mail your submission to jan.eitzinger at fau.de .
Dr.-Ing. Jan Eitzinger, HPC Services
Regionales RechenZentrum Erlangen (RRZE)
Martensstrasse 1, 91058 Erlangen, Germany
Tel. +49 9131 85-28911, Fax +49 9131 302941
mailto:jan.eitzinger at rrze.fau.de
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