[mpich-discuss] Mixing different CPU architectures

[Pavan Balaji]

Instruction set architecture.

As far as I can tell, it should work for the two machines listed below. 
But again, we don't test MPICH2 across two different types of nodes.

  -- Pavan

On 11/18/2010 04:31 AM, Saurav Pathak wrote:
> Pavan,
>
> Thank you for your reply.  By ISA, do you mean the bus architecture?  I
> am not sure what it means.  I shall be buying from the same vendor and
> the same model, but different CPU choices.
>
> This link compares the two CPUs.
> http://ark.intel.com/Compare.aspx?ids=47922,37103,
>
> I am not sure what I should be looking at to see if they are compatible
> within MPICH2 restrictions.
>
> Thanks,
> Saurav
>
>
>
> On 11/17/2010 11:57 AM, Pavan Balaji wrote:
>>
>> MPICH2 has a restriction on mixing different ISA's. Otherwise,
>> different processor speeds, etc., should not matter much (apart from
>> one of them being idle for longer during synchronization, as you
>> pointed out). Of course, this is not a tested configuration, though.
>>
>>   -- Pavan
>>
>> On 11/17/2010 10:49 AM, Saurav Pathak wrote:
>>> Hi All,
>>>
>>> This is not specifically a MPICH question, but related.
>>>
>>> Is it OK to mix different CPU architectures in a set of nodes?  For
>>> instance, I have dual quad code (Intel E5530, 2.4 MHz, 8MB L3) system.
>>> Can I add a dual six core (Intel X5650, 2.66MHz, 12M L3) node to the mix
>>> and still use MPICH?  Would I have to compile MPICH separately for
>>> different architectures?  For tasks that are equally divided, the faster
>>> system will obviously be idle for longer.
>>>
>>> I would like to hear your experience and comments.
>>>
>>> Thanks,
>>> Saurav
>>> _______________________________________________
>>> mpich-discuss mailing list
>>> mpich-discuss at mcs.anl.gov
>>> https://lists.mcs.anl.gov/mailman/listinfo/mpich-discuss
>>
>

-- 
Pavan Balaji
http://www.mcs.anl.gov/~balaji