[hpc-announce] [CFP] IA^3 2026: 16th SC Workshop on Irregular Applications: Architectures and Algorithms

[Tumeo, Antonino]

[Apologies for Multiple Postings]

IA^3 2026
16th Workshop on Irregular Applications: Architectures and Algorithms
https://urldefense.us/v3/__https://hpc.pnl.gov/IA3/__;!!G_uCfscf7eWS!dXBKWCHZA7coJ2Ss0MGhCUrxz85-Exk3USZXQujnRbTLH76EqerknHZI2sWAiQGJwiVmfD0E3xZKK-LiMX2WzWJpAmGFCqvMZw$ 
McCormick Place, Chicago, IL
In conjunction with SC26

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CALL FOR PAPERS
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Emerging data-intensive, supercomputing applications are evolving towards a convergence of scientific simulations, data analytics, and learning algorithms. Components of these applications belong to both established and emerging fields, such as machine learning, social network analysis, bioinformatics, semantic graph databases, Computer Aided Design (CAD), and computer security. In processing massive volumes of unstructured data, components often perform many irregular, fine-grained accesses and synchronization events. Because current high-performance programming models, runtimes, and architectures rely on regular task graphs, bulk synchronous communications, and high temporal and spatial data locality to reduce latency, it is difficult to express irregular applications in current HPC programming models and scale performance on current supercomputing machines. Developing improved programming and execution models that address the problems of irregular applications is critical to solving the data challenges in large-scale science and data analytics.

This workshop explores solutions to support the efficient execution of irregular applications in the form of new features at the micro and system architecture, network, language and library, runtime, compiler, algorithm, and performance study levels.

Special Topic on Dynamic Networks: similar to previous years, the workshop continues to include a subtopic on dynamic network analysis — with an expanded focus on streaming graphs and real-time network evolution. As networks increasingly arrive as continuous data streams rather than static snapshots, we invite submissions that engage with this shift head-on. We invite papers on:
- Streaming and online graph algorithms — efficient processing of edge/node insertions and deletions
- Scalable data structures for evolving networks — indexing, sketching, and summarization techniques that support high-throughput graph updates
- Machine learning on dynamic and streaming graphs — temporal graph neural networks (TGNs), continuous-time dynamic graph models, and representation learning that captures structural drift over time
- Domain applications of dynamic network analysis — including but not limited to: financial transaction fraud detection, real-time social influence propagation, knowledge graph maintenance, and network anomaly detection in cybersecurity
- Position papers and surveys — critical perspectives on open challenges in dynamic graph analysis, reproducibility in streaming benchmarks, and the gap between theoretical models and applications.

Topics of interest for the workshop  (not including the special topic), of both theoretical and practical significance, include but are not limited to those listed below. For the sake of simplicity, we have categorized them, but the submission track will be one.

Architectures and Systems for Irregular Workloads
- Computer micro- and system architectures: multi- and many-core design, heterogeneous processors, GPUs, vector processors, automata processors, AI and ML accelerators, reconfigurable architectures (CGRA, FPGAs), and custom processors.
- Interconnects and network architectures: high-radix networks, optical interconnects.
- Emerging memory architectures: including processor-in-memory designs.
- The impact of emerging computing paradigms: neuromorphic processors, quantum computing.
- Modeling, simulation, and evaluation of novel architectures for irregular workloads.

Programming Models, Languages, and Tools
- Programming models and languages designed for irregular computation.
- Libraries and runtime support for dynamic and irregular workloads.
- Compiler techniques and static/dynamic analysis for optimizing irregular applications.
- Parallelization techniques and data structures for irregular workloads.
- Data structures that combine regular and irregular computations (e.g., attributed graphs).

Algorithms and Computational Techniques
- Innovative algorithmic techniques for irregular workloads.
- Combinatorial algorithms: graph algorithms, sparse linear algebra, etc.
- Techniques for managing massive unstructured datasets, including streaming data.
- Integration of graph algorithms with machine learning techniques.

Applications and Use Cases
- Emerging applications that integrate scientific simulations, data analysis, and learning, and require efficient execution of irregular workloads.
- High-performance data analytics applications, including:
    - Graph databases and semantic web technologies, etc.
    - Bioinformatics: genome sequencing, protein interaction networks, etc.
    - CAD for microelectronics: irregular mesh processing, layout optimization, etc.
    - Cybersecurity: anomaly detection in dynamic networks, etc.
    - Social network analysis: community detection, influence propagation.
- AI and machine learning applications are impacted by irregularity:
    - Graph neural networks (GNNs).
    - Large language models (LLMs) with sparse attention or irregular data access.

The workshop welcomes regular paper submissions, papers describing work-in-progress or incomplete but solid work, and innovative ideas related to the workshop theme. The workshop solicits both 8-page regular papers and 4-page position papers. The authors of exciting but not mature enough regular papers may be offered the option of a short 4-page paper and an associated short presentation.

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IMPORTANT DATES
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Abstract Submission: July 24, 2026 (AoE)
Position or Regular Paper Submission: July 31, 2026 (AoE)
Notification: September 4, 2026
Camera-ready: September 25, 2026
Workshop: November 15, 2026

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SUBMISSIONS
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Submission site:  https://urldefense.us/v3/__https://submissions.supercomputing.org/?page=Submit&id=SCWorkshopIA3Abstract&site=sc2__;!!G_uCfscf7eWS!dXBKWCHZA7coJ2Ss0MGhCUrxz85-Exk3USZXQujnRbTLH76EqerknHZI2sWAiQGJwiVmfD0E3xZKK-LiMX2WzWJpAmEKbQLiPw$ <https://urldefense.us/v3/__https://submissions.supercomputing.org/?page=Submit&id=SCWorkshopIA3Abstract&site=sc25__;!!G_uCfscf7eWS!dXBKWCHZA7coJ2Ss0MGhCUrxz85-Exk3USZXQujnRbTLH76EqerknHZI2sWAiQGJwiVmfD0E3xZKK-LiMX2WzWJpAmEyJlaBsQ$ >6

Submitted manuscripts may not exceed eight (8) pages in length for regular papers and four (4) pages for position papers (excluding references).
Authors of regular papers will be able to provide up to one (1) additional pages for the Artifact Description (AD) appendix and, after paper acceptance, up to two (2) additional pages for the Artifact Evaluation (AE) appendix.

The templates are available at: https://urldefense.us/v3/__https://www.ieee.org/conferences/publishing/templates__;!!G_uCfscf7eWS!dXBKWCHZA7coJ2Ss0MGhCUrxz85-Exk3USZXQujnRbTLH76EqerknHZI2sWAiQGJwiVmfD0E3xZKK-LiMX2WzWJpAmHiUVUE6A$ 

The proceedings of the workshop will be published in IEEE Xplore.
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GENERAL CO-CHAIRS
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Antonino Tumeo, PNNL, antonino.tumeo at pnnl.gov
Mahantesh Halappanavar, PNNL, mahantesh.halappanavar at pnnl.gov

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TECHINICAL PROGRAM CO-CHAIRS
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Bahar Asgari, University of Maryland, bahar at umd.edu
Ariful Azad, Texas A&M University, ariful at tamu.edu

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SPECIAL TOPIC CO-CHAIRS
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Sanjukta Bhowmick, University of North Texas, sanjukta.bhowmick at unt.edu
Nicolas Bohm Agostini, PNNL, nicolas.agostini at pnnl.gov

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ARTIFACT EVALUATION CHAIR
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Biagio Cosenza, University of Salerno, bcosenza at unisa.it

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INCLUSIVITY CO-CHAIRS
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Vito Giovanni Castellana, PNNL, vitogiovanni.castellana at pnnl.gov
Ankur Limaye PNNL, ankur.limaye at pnnl.gov

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TECHNICAL PROGRAM COMMITTEE
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Scott Beamer, UCSC, US
Michela Becchi, NCSU, US
Benjamin Brock, Intel, US
Martin Burtscher, Texas State University, US
Pasqua D'Ambra, IAC-CNR, IT
Aditya Devarakonda, Wake Forest University, US
Reza Farahani, Technical University of Wien, AT
S M Ferdous, PNNL, US
Oded Green, NVIDIA, US
Kathrin Hanauer, University of Vienna, AT
Yuxi Hong, Indiana University, US
Md Taufique Hussain, Wake Forest University, US
Johannes Langguth, Simula, NO
Jiajia Li, NCSU, US
Marco Minutoli, AMD, US
José Moreira, IBM TJ Wattson, US
Fanny Nina Paravecino, Microsoft, US
Gal Oren, Stanford University, US and Technion, IL
Lorenzo Pichetti, University of Trento, IT
Jože Rožanec, Jožef Stefan Institute, SL
Kentaro Sano, RIKEN, JP
Catherine Schuman, University of Tennessee, Knoxville, US
Sudip Seal, ORNL, US
Tyler Sorensen, UCSC, US
Gwendolyn Voskuilen, SNL, US
Helen Xu, Georgia Institute of Technology, US
Nick Yakovets, Eindhoven University of Technology, NL

Other members TBD