[hpc-announce] FCCM 2020 Call for (Virtual) Participation. Dates: May 4 - 8

Dustin Alexander Richmond dustinar at uw.edu
Fri May 1 19:33:20 CDT 2020


** Please Distribute Widely *** 


FREE REGISTRATION Begins Monday May 4th at www.fccm.org <http://www.fccm.org/>
Technical program: https://www.fccm.org/home/program/

The IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM) 2020 is now a virtual conference organized as a series of interactive forums that mirror 6 paper sessions (with Best Paper Award), 6 poster sessions, and 3 live workshops.

The forums will be open to attendees on the FCCM website starting May 4th.  Registration for these forums is free and open to the entire community.  Every paper and poster session has links to the PDFs that will appear in the proceedings along with a discussion thread.  Papers and posters are accompanied by a video presentation - 20 minutes for full papers, 10 minutes for short papers, and 5 minutes for posters.  The discussion forums will remain open for attendees to post questions and comments until June 1st.  After this point, the presentations and comments will still be viewable, but new comments will be disabled.  As usual, the proceedings will be posted to IEEE Xplore after the conference has concluded. 

In addition to the asynchronous technical sessions, 3 live workshops will be run on Wednesday, Thursday, and Friday, May 6th – 8th.  Intel will present “Intel FPGA Clouds for Academic Research and Teaching” on May 6th. There will also be a research-focused workshop, “The Future of FPGA-Acceleration in Cloud and Datacenters” on May 6th.  Xilinx will discuss “Compute Acceleration Workflow using Vitis and PYNQ” in two parts on May 7th and 8th. Registration and further details on these workshops can be found on the Workshops section of the Program page: https://www.fccm.org/home/program/#workshops <https://www.fccm.org/home/program/#workshops>, and below.


Questions about this call should be directed to the program chair, Ken Eguro.



INTEL FPGA CLOUDS FOR ACADEMIC RESEARCH AND TEACHING

Thursday, May 6, 2020
11:00 AM - 12:00 PM CDT

Abstract:

With online learning a fact of life for the short term, this workshop presents Intel FPGA cloud services to keep students and researchers learning, innovating and utilizing FPGAs to solve challenging heterogeneous computing problems. Intel cloud services offer academics and researchers access to servers with the latest Xeon CPUs and one or more Intel FPGA accelerator cards per node. Leading edge development tools and frameworks facilitate productive research and teaching. Supported development flow include: RTL, HLS, OpenCL, DPC++/OneAPI and OpenVino overlays. We will provide an overview of how to register to acquire login access, and demonstrate various workload compilations, setup and execution. There is no cost to utilize these cloud services. Intel looks forward to serving your FPGA training and research needs!


Flyer: http://fccm.org/proceedings/2020/FCCM_2020_Intel_Brochure.pdf <http://fccm.org/proceedings/2020/FCCM_2020_Intel_Brochure.pdf>




THE FUTURE OF FPGA-ACCELERATION IN CLOUD AND DATA CENTERS

Wednesday, May 6th, 2020,
11:00 AM - 05:00 PM CDT

Abstract:

Abstract Field-Programmable Gate Arrays (FPGAs) are becoming integral components of general purpose heterogeneous cloud computing systems and data centers due to their ability to serve as energy-efficient domain customizable accelerators. All major players such as Microsoft, Amazon, Intel, Baidu, Huawei, and IBM now expose FPGAs to application developers in their cloud and datacenter infrastructures. Besides commercial infrastructure, a growing number of projects are underway across the globe, in academia and other research organizations to provide the benefit of acceleration and flexibility remotely to users. Current developments are taking place behind closed doors and companies and institutions disclose very little on the challenges they encounter as well as the approach currently used to tackle those challenges. This workshop will bring experts from various fields around cloud, FPGA, computer architecture and applications to 1) discuss the status FPGA-acceleration in cloud computers and 2) explore the future and challenges in broad adoption of FPGAs in data centers. Topics of interest include FPGA integration, middleware, resource virtualization, security, programming, and applications.

Flyer:
http://www.fccm.org/proceedings/2020/FCCM2020_Cloud_And_Datacenters_Workshop_Program.pdf <http://www.fccm.org/proceedings/2020/FCCM2020_Cloud_And_Datacenters_Workshop_Program.pdf>



COMPUTE ACCELERATION WORKFLOW USING VITIS AND PYNQ

Thursday, May 7, and Friday, May 8, 2020
**Same times both days**
10:00 AM – 1:00 PM CDT (Presentation)
1:00 PM – 4:00 PM CDT (Lab)

Abstract:

Xilinx has recently introduced open-source free-downloadable Vitis unified software platform which enables the development of embedded software and accelerated applications on heterogeneous Xilinx platforms including FPGAs, SoCs, and Versal ACAPs. It provides a unified programming model for accelerating edge, cloud, and hybrid computing application. Vitis allows integration of high-level frameworks, development in C, C++, or Python using accelerated libraries or use of RTL-based accelerators & low-level runtime APIs for more fine-grained control over implementation.

Xilinx provides datacenter centric development boards (Alveo) suitable for application acceleration which are well supported by Vitis. Recently, Xilinx’s open-source project, PYNQ, has also been ported to Alveo boards using Vitis and Python. In this tutorial you’ll get your hands on Vitis and PYNQ to experience their compute acceleration features.




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