[hpc-announce] FPL2019 Call-for-Papers

Xavier Martorell xavim at ac.upc.edu
Tue Mar 12 03:28:09 CDT 2019

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*                        29th International Confererence on                   *
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*                    Field-Programmable Logic and Applications                *
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*       9-13 September, 2019     Barcelona, Spain     http://fpl2019.bsc.es   *
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                             ** CALL FOR PAPERS **

Abstract submission (mandatory): March 15, 2019 (AOE)
Full paper submission deadline : March 22, 2019 (AOE)
Rebuttal period:                 April 29th to May 1st, 2019
Notification of acceptance (tentative): May  20th, 2019
Final paper submission                : June 20th, 2019

Submission is now open

Paper Submission at Easychair: https://easychair.org/conferences/?conf=fpl20190

When submitting your paper, please select the track the paper better suits,

     * Architectures and Technology
     * Programming Models, Methods and Tools
     * Applications and Benchmarks


The International Conference on Field-Programmable Logic and Applications is
the premier conference covering the area of field-programmable logic
architectures, reconfigurable computing and applications. The conference
continues to bring together researchers and practitioners from both academia
and industry and from around the world, to discuss about topics related to
those areas. During the past 28 years, many of the advances in reconfigurable
system architectures, applications, embedded processing, design automation
methods and tools have been first published in the proceedings of the FPL
conference series.

The 29th edition will be held in the premises of the Universitat Politecnica de
Catalunya (UPC) in Barcelona, also hosting the Barcelona Supercomputing Center
(BSC). The event will take place at the UPC Vertex Building on the North Campus
of the University (Dulcet Street, no. 1, Barcelona).

Submission Guidelines

Authors are invited to submit original and unpublished papers in IEEE double
column format. *Submitted papers must be limited to 6 pages plus references*
(i.e. the references do not count in the 6 pages; and references must not 
exceed two pages). This is a strict limit, and papers exceeding this limit
will be rejected automatically.

Authors are required to use the standard IEEE templates in format A4 and not
to include page numbers, to ensure compatibility with IEEE Xplore. Templates
for LaTeX and Microsoft Word 2003 are available directly from IEEE:


All contributions must be submitted electronically in PDF format. FPL 2019
uses a double-blind reviewing system. Manuscripts must not identify
authors or their affiliations; those that do will not be considered.
Exceptions may be allowed with prior approval of the Programme Chairs,
in cases where the authors’ identity is vital to evaluating the paper 
(e.g., papers presenting updates of infrastructure used by the FPGA community).
References to the authors’ prior work should be made in the 3rd person, in 
the same way one would reference work by others. If necessary to maintain
anonymity, citations may be shown as “Removed for blind review”, but consider
that this may impede a thorough review if the removed citation is crucial to
understanding the submission.


Papers accepted as full papers will appear in the proceedings as 6 pages 
papers plus up to 2 pages of references. Short papers (posters) will have
4 pages plus up to 2 pages of references in the proceedings. Extended 
abstracts for PhD Forum and Demo Night contributions will appear with
2 pages (strict, including references) in the proceedings. Authors of
full papers and short papers (posters) will have the possibility to buy
2 additional pages. The conference proceedings will be made available
online during the conference. The conference proceedings will be published
with IEEE Xplore. 

Authors of selected papers will be invited to submit extended versions to a 
special issue in ACM TRETS. The PhD forum is intended as a venue for PhD
students to present their work in progress and preliminary results in a 
special poster session to receive feedback from other researchers.  

Additionally, FPL 2019 will include two days of workshops and tutorials
(Sep. 12 and 13), poster session, and the PhD Forum and Demo Night.
Further details will be published soon.


Contributions within (but not limited to) the following topics related to
Field-Programmable Logic and Applications are very welcome:

  * Architectures and Technology
  * Applications and Benchmarks
  * Programming models and languages
  * System software and environment support
  * Design Methods and Tools
  * Accelerated Machine Learning
  * Surveys, Trends, and Education


Ioannis Sourdis, Carlos Alvarez, and Christos-Savvas Bouganis,
Technical Programme Co-Chairs

Xavier Martorell
General Chair
Xavier Martorell
Computer Architecture Department     DAC || Computer Science/Programming Models
Universitat Politecnica de Catalunya UPC || Barcelona Supercomputing Center BSC
xavim at ac.upc.edu  people.ac.upc.es/xavim ||      xavier.martorell at bsc.es

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