[hpc-announce] Call for WIP - RAPIDO'18 co-located with HiPEAC Conference

[Gianluca Palermo]

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CALL FOR WORKS IN PROGRESS
10th Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools - RAPIDO
(http://www.rapido.deib.polimi.it)
in Mancherster, United Kingdom, 22th January 2018
Held in conjunction with the HiPEAC Conference  (http://www.hipeac.net/conference)
!!! Accepted papers will be published in the ACM digital library !!!

This call concerns the works in progress in your research teams
The objective of this call is to give the opportunity for not completely mature researches to be presented in order to discuss and to exchange with other researchers in the community

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Goal of the Workshop :
The focus of the RAPIDO workshop is on methods and tools for rapid simulation and performance evaluation in embedded and high performance system design. Given continuous advances in chip technology, it is to be expected that future-generation processors will integrate numerous units on a single die, including multiple (heterogeneous) processor cores, multiple levels of (shared/private) caches or memories, and dedicated accelerators, which will be glued together through a network on-chip (NoC).
The design space is huge though and several design metrics should be considered as well for selecting the optimal system configuration. Despite several years of research, the early stage design phase still requires to be supported by innovative design methodologies and tools for simulation, exploartion and performance evaluation. RAPIDO seeks for original research papers that face this challenge for embedded and high performance computing systems.

Topics of interest :
Topics of interest include, but are not limited to:

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Rapid simulation techniques targeted at novel architectures: Multi-cores, 3D-architectures, FPGA based heterogeneous Multi-cores/MPSoC, ...
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Variability and power/energy consumption in performance estimation and simulation techniques.
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High-level abstraction modeling, e.g., Transactional Level Modeling (TLM), Analytical Modeling, Trace-Driven Simulation …
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Design space exploration (DSE) for heterogeneous high-performance and embedded systems.
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Dynamic binary translation for fast simulation and DSE
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Experience reports using existing simulators and tools
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Benchmarking and simulator validation
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Early stage prototype of innovative architectures

Important dates:

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Submission deadline: Nov 21, 2017
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Notification to authors: Nov 30, 2017
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Final version of accepted papers: Dec 5, 2017

Paper submission :
Electronic paper submission requires a full paper, up to 6 double-column ACM format pages, including figures and references. Up to 2 extra-pages can be requested for free to the organizing commettee. Please use the following template when preparing your manuscript: http://www.acm.org/sigs/publications/proceedings-templates
The paper submission will be conducted using the EasyChair conference manager. Papers should be submitted in PDF format. You will find the submission site at:
https://www.easychair.org/conferences/?conf=rapido18<https://www.easychair.org/conferences/?conf=rapido15>
Accepted papers will be published in the ACM digital library.




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Gianluca PALERMO

Associate Professor
Politecnico di Milano
DEIB - Dipartimento di Elettronica,
Informazione e Bioingegneria
Office Ph: +39-02-2399-3552
http://home.deib.polimi.it/gpalermo<http://home.dei.polimi.it/gpalermo>

"Today is a special day. Do you know why?
... Because EVERY day is a special day!"

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