[hpc-announce] WAMCA 2016 - Last CFP - Aug 14th (EXTENDED DEADLINE)

[Mauricio Pilla]

We apologize for possible duplications.
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<<< CALL FOR PAPERS >>>  -  Submission Deadline: August 14th, 2016 (EXTENDED)

7th WORKSHOP ON APPLICATIONS FOR MULTI-CORE ARCHITECTURES - WAMCA
October 26-28, 2016, Marina del Rey Marriott, Los Angeles, California, USA

http://www.cos.ufrj.br/wamca/

To be held in conjunction with the 28th International Symposium on
Computer Architecture and High Performance Computing (SBAC-PAD 2016)

Important dates:
  Paper submission: August 14th, 2016 (EXTENDED)
  Paper acceptance notification: August 29th, 2016
  Camera-ready: September 12th, 2016

                      This workshop opens up an opportunity for application designers and
                      computer architects to discuss emerging applications as well as their
                      implications on current and next-generation many-core architectures.
                      Our goal is to confirm the current status of application development and
                      optimization techniques for the new technologies as well as the future
                      trends, exposing the findings, requirements, and problems to a select
                      audience of top computer architecture researchers. We aim to focus on
                      the discussion of multi-core computing from different aspects such as:

                      Benchmarking and Tools
                         Compilers, debuggers, and profilers
                         Methodologies, Metrics, and Benchmarking
                         Comparative studies of many-core architectures
                      Architecture and Performance Analysis
                         MPSoC architectures
                         Performance and power Analysis
                         NoC-based multi-core architectures
                         Multi-core interconnection networks
                         Inter-core communication algorithms
                         Evaluating and tuning application power-footprints
                      Applications, Algorithms and Programming Models
                         Scheduling and fault-tolerance issues
                         Multicore applications for data-centers
                         Parallelization algorithms and techniques
                         I/O techniques for multicore programming
                         GPU-based applications and programming
                         Parallelizing known applications and evaluating performance
                         Parallelization algorithms, techniques, and programming models

Workshop Chairs

Claude Tadonki (Mines-Paristec)
Cristiana Bentes (State University of Rio de Janeiro)
Guido Araujo (State University of Campinas)
Lucia Drummond (Fluminense Federal University)
Mauricio Pilla (Federal University of Pelotas)
Phillippe Navaux (Federal University of Rio Grande do Sul)
Ricardo Farias (Federal University of Rio de Janeiro)


Program Committee

Alexandre Domingues (IFRJ)
Alexandre Solon Nery (UERJ)
Andre Maximo (GE GRC-R)
Claude Tadonki (Mines-Paristech)
Cleomar Pereira da Silva (IFC - Videira)
Cristiana Bentes (UERJ)
Diego Brandao (CEFET RH)
Eyder Rios (UFF) 
Felipe Franca (UFRJ) 
Guido Araujo (UNICAMP)
Guilherme Cox (Rutgers-US)
Henrique Freitas (Puc MG)
Igor Machado (UERJ) 
Irving Badolato (UFRJ)
Juliana Silva Zamith (UFRRJ) 
Leandro Marzulo (UERJ)
Lucia Maria Drummond (UFF)
Luciano de Paula (UFRJ)
Marcelo Zamith (UFRRJ) 
Mauricio Pilla (UFPEL)
Patrick Happ (Puc RJ)
Philippe Navaux (UFRGS)
Puca Huachi Penna(UFF)
Ricardo Farias (UFRJ)
Rodolfo Azevedo (Unicamp) 
Sandro Rigo (Unicamp)
Tiago Neves (UERJ)

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Mauricio Lima Pilla, D.Sc.

Laboratory of Ubiquitous and Parallel Systems -- LUPS
Center for Technological Development -- CDTec
http://lups.ufpel.edu.br/~pilla

"I'm just very selective about the reality I choose to accept."
    -- Calvin