[hpc-announce] ExaMPI 2026 (Workshop on Exascale MPI) Call for Papers

[Derek Schafer]

-------------------------------------------------------------------------------

ExaMPI26 - Workshop on Exascale MPI 2026
Half-Day SC Workshop, date to be announced

Held in conjunction with SC26:  
The International Conference for High Performance Computing, Networking, 
Storage and Analysis, November 15-20, 2026, Chicago, Illinois, USA

https://urldefense.us/v3/__https://sites.google.com/site/workshopexampi/home__;!!G_uCfscf7eWS!arm1lNzlpDc2CbZOZyII6sdcB7MI9gFPktuseumE7SilXACGwfSBjQA2BeAb5TAlVezhpILP86-pbg4gHVHrJfa57Q$ 

-------------------------------------------------------------------------------

*** Call for Papers ***

-------------------------------------------------------------------------------

The MPI standard and its implementations have proven to be both scalable and 
highly capable of capitalizing on novel software and hardware technologies. 
However, trends towards increasingly heterogeneous compute nodes, 
containerization, networks with powerful offloading capabilities, 
alternative programming models, and non-traditional workloads present new 
challenges and opportunities for innovation. The aim of this workshop is to 
bring together developers and researchers to present and discuss algorithms, 
protocols, operations, and concepts in message passing programming models that 
address these challenges and opportunities, with a focus on MPI in particular.

Submissions targeting any relevant topic are welcomed. Topics of interest 
include (but are not limited to):

  * MPI for AI applications.
  * Design and development of scalable message passing collective operations.
  * Innovative algorithms for scheduling/routing to avoid network congestion.
  * One-sided communication models and RDMA-based MPI.
  * Support for heterogeneous compute devices and heterogeneous memory systems.
  * MPI multi-threading and threading requirements from OSes.
  * Interoperability of message passing and other programming models, 
    such as PGAS.
  * Communication and architecture topology mapping interfaces and algorithms.
  * Integration of task-parallel models into message passing models.
  * Fault tolerance in MPI.
  * Utilization of `smart' or programmable offloading technologies.
  * MPI I/O.

-------------------------------------------------------------------------------

Important Dates

-------------------------------------------------------------------------------

Submission deadline: July 31st, 2026 (AOE)
Author notification: September 4th, 2026 
Accepted Papers Camera Ready Due: September 25th, 2026

-------------------------------------------------------------------------------

Paper Submission and Publication

-------------------------------------------------------------------------------

Submissions should be between 6 and 10 pages, including figures, and not 
including references. Templates are available here: 
https://urldefense.us/v3/__https://www.ieee.org/conferences/publishing/templates.html__;!!G_uCfscf7eWS!arm1lNzlpDc2CbZOZyII6sdcB7MI9gFPktuseumE7SilXACGwfSBjQA2BeAb5TAlVezhpILP86-pbg4gHVHw2KFq4Q$ 
Please use the IEEE Conference Template.

Submissions can be made at: https://urldefense.us/v3/__https://submissions.supercomputing.org__;!!G_uCfscf7eWS!arm1lNzlpDc2CbZOZyII6sdcB7MI9gFPktuseumE7SilXACGwfSBjQA2BeAb5TAlVezhpILP86-pbg4gHVHW91nXUg$  

Instructions for preparing papers for the proceedings will be emailed to 
authors of accepted papers. For queries concerning papers (submission, 
deadlines, publishing, etc.) please contact Matthew Dosanjh <mdosanj at sandia.gov>.