[hpc-announce] SBAC-PAD 2026 October 14 to 16 in Madrid, Spain - Call for Papers

[JESUS CARRETERO PEREZ]

########.   SBAC-PAD 2026 - Call for Papers ###############

The 38th IEEE/SBC Symposium on Computer Architecture and High
Performance Computing will take place from October 14 to 16 in Madrid,
Spain.

SBAC-PAD is an annual international conference series that presents
the latest trends, current research and developments, and novel tools
and applications in the fields of Computer Architecture,
High-Performance Computing, and Parallel and Distributed Computing
technologies. SBAC-PAD is open to industry, faculty, researchers,
practitioners, and undergraduate and graduate students from around the
world. Its scientific program is composed of high-quality submitted
papers, selected by a thorough peer review process, and invited talks
from renowned researchers.

## Important dates:

- Abstract submission deadline: May 15th, 2026 (AoE)
- Paper submission deadline: May 22nd, 2026 (AoE)
- Rebuttal period: July 22nd - 27th, 2026
- Author notification: August 3rd, 2026
- Camera-ready submission: September 5th, 2026

## Tracks:

Authors are invited to submit original manuscripts to one of six
tracks that address challenges in any of the following areas related
to the fields of Computer Architecture (CA) and High-performance and
Distributed Computing (HPDC).

Track 1 - System Software: Focuses on the design, implementation, and
optimization of operating systems, compilers, runtimes, and middleware
for high-performance, parallel, and distributed computing
environments. Topics include virtualization, scheduling, resource
management, and programming support for emerging architectures.

Track 2 - Computer Architecture: Covers advances in processor, memory,
interconnect, and accelerator design, including GPUs, FPGAs, and
near-data processing. This track also welcomes contributions on
reconfigurable, energy-efficient, resilient, and secure architectures
for modern computing systems.

Track 3 - Distributed Systems, Networking and Storage: Explores
scalable distributed infrastructures such as clouds, clusters, and
edge/fog systems. It also includes work on networking technologies,
data management, storage systems, and I/O frameworks for
data-intensive and high-throughput workloads.

Track 4 - Parallel Applications and Algorithms: Dedicated to the
development and analysis of parallel and distributed algorithms,
programming models, and real-world scientific and engineering
applications. Submissions addressing performance, scalability, and
resilience on modern architectures are particularly encouraged.

Track 5 - Performance Evaluation: Focuses on benchmarking, modeling,
simulation, and analytical methods for evaluating and predicting the
performance of hardware and software systems. Topics include
power-aware and predictive performance models, as well as tools for
profiling and optimization.

Track 6 - Parallel and Distributed Computing for AI and Data
Analytics: Encompasses AI and machine learning methods applied to
computer architecture and high-performance computing, as well as the
use of HPC for AI workloads. It also includes tools, frameworks, and
data-driven approaches that enhance productivity and insight in
large-scale computing environments.

The program committee will select the top-ranked papers as finalists,
and one paper will be selected during the conference as the Best
Paper.

Selected papers will be invited to a special issue in a high-impact journal.

## Paper guidelines:

Paper submissions must be in English, have 10 pages maximum (excluding
the references), and follow the IEEE conference manuscript formatting
guidelines for double-column text using a single-spaced 10-point font
on 8.5 × 11-inch pages. Templates are available from
https://urldefense.us/v3/__http://www.ieee.org/conferences/publishing/templates.html__;!!G_uCfscf7eWS!eXcVtA8U5FyEqvSesNYEfbZp8OuGWCmY-LRfnc4e2V-Dd4mypV85GE8XYOh0-1MGuYdzxp3tLP9oPKW4CuPjjEELnm8R$ . Papers that
do not meet these requirements might be rejected without a review. To
be published in the conference proceedings and to be eligible for
publication at the IEEE Xplore, one of the authors must register at
the full rate and present his/her work at the conference.

The SBAC-PAD 2026 submissions will undergo a double-anonymized review
process, where reviewers will not know the authors’ identities, and
vice-versa. Therefore, authors should “anonymize” their submission by
adopting the following guidelines; otherwise, papers will be rejected
without review:

Authors cannot include their names, affiliations, funding sources, or
acknowledgments in any part of the for-review version of their paper;

Self-references that are relevant to the work are allowed, but they
should not appear in the text in the first person. Instead, they
should be referenced in the third person, like “Smith et al. found
that… [4].”, and for the authors’ own unpublished work, use anonymous
citations.

## Paper submission:

Submission must be done using EasyChair:
https://urldefense.us/v3/__https://easychair.org/my2/conference?conf=sbacpad2026__;!!G_uCfscf7eWS!eXcVtA8U5FyEqvSesNYEfbZp8OuGWCmY-LRfnc4e2V-Dd4mypV85GE8XYOh0-1MGuYdzxp3tLP9oPKW4CuPjjHu28S3q$ 


-- 
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Prof. Jesus Carretero
Computer Architecture Professor
Director of the PhD Program in Computer Science and Technology
Computer Science and Engineering Dep. University Carlos III of Madrid
Avda. Universidad 30,  28911 Leganes, Madrid, Spain
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