[hpc-announce] CFP: MEMO’25 at SC - International Workshop on Memory System, Management and Optimization - Papers due July 27

[Hale, Kyle]

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                          CALL FOR PARTICIPATION
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2nd International Workshop on Memory System, Management and Optimization (MEMO ‘25)

Held in conjunction with The International Conference for High
Performance Computing, Networking, Storage, and Analysis (SC'25)

November 16, 2025, St. Louis, MO, USA

https://urldefense.us/v3/__https://kth-scalab.github.io/events/memo25__;!!G_uCfscf7eWS!aetWyv-mtVSJaB4YXMFGaKsO0ZvIknJf6eSg-0XHAltiw2OT--PUgCj7WM2YGrgnjvK76yvBYXi6g-MuorQ-qCWLIgi8iJg$ 

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The growing disparity between computing speed and memory speed, commonly
referred to as the memory wall problem, remains a critical and enduring
challenge in the computing community. Recent developments, such as the
expansion of the memory hierarchy and the increasingly blurred line between
memory and storage, coupled with the introduction of new memory
technologies, such as high-bandwidth memory, non-volatile memory, and
disaggregated memory, further complicate the situation. The prevalence of
heterogeneous computing, ongoing advancements in the memory hierarchy, and
the rise of disaggregated architectures significantly broaden the scope of
this challenge. Simultaneously, the proliferation of large machine learning
(ML) models, graph processing applications, and traditional scientific
applications facing bottlenecks due to memory latency, bandwidth, or
capacity issues continue to drive researchers, professionals, and
practitioners to enhance memory system design and memory management,
overcome the constraints imposed by the memory wall, and facilitate
high-performance memory-intensive applications.

Computer architecture, operating systems, storage systems, performance
models, tools, and applications themselves are being enhanced or even
redesigned to address the performance, programmability, and energy
efficiency challenges of the increasingly complex and diverse memory
systems for HPC and data-intensive applications. Exploring the intersection
of these research areas will enable cohesive and synergistic development and
collaboration on the future of memory technologies, systems, and applications.

WORKSHOP TOPICS

This workshop aims to bring together computer science and computational
science researchers, from industry, government labs and academia, concerned
with the challenges of efficiently using existing and emerging memory
systems. The term performance for memory systems is general, to include
latency, bandwidth, power consumption and reliability from
hardware memory technologies to the software stack to impacts manifested in application
performance. The topics of interest include, but are not limited to:

* Evaluation, characterization, performance analysis, and use cases of
existing and emerging memory technologies, including non-volatile,
high-bandwidth, heterogeneous, disaggregated memories.

* Software, hardware, and co-design approaches that ease the adoption and
optimize the use of processing-in-memory and near-memory computing technologies.

* Programming interfaces or language extensions that improve the
programmability of using existing and emerging memory technologies and systems,
heterogeneous memory system and unified memory systems.

* Compiler, runtime, and system techniques for optimizing data layout and
placement, page migration, coherence and consistency enforcement, latency
hiding and improving bandwidth utilization and energy consumption of
complex tiered memory systems.

* Enhancements or new developments in operating systems, storage and file
systems, and I/O system that address challenges of existing and emerging
memory technologies, memory hierarchies, heterogeneous memory systems,
and the blurred boundary between memory and storage.

* Tools, modeling, evaluation, and case studies of memory system behavior and
application performance that reveal the limitations and characteristics of
existing memory systems.

* Application development and optimization for new memory architectures and
technologies and experiences overcoming memory related challenges in code development efforts.


IMPORTANT DATES

All dates are Anytime-on-Earth (AoE)
* Full paper submission deadline: July 27, 2025
* Author notification: September 1, 2025
* Camera-ready deadline: September 29, 2025
* Workshop: November 16, 2025

For full workshop details, see:
https://urldefense.us/v3/__https://kth-scalab.github.io/events/memo25__;!!G_uCfscf7eWS!aetWyv-mtVSJaB4YXMFGaKsO0ZvIknJf6eSg-0XHAltiw2OT--PUgCj7WM2YGrgnjvK76yvBYXi6g-MuorQ-qCWLIgi8iJg$ 

ORGANIZING COMMITTEE

Ivy Peng (KTH Royal Institute of Technology, Sweden)
Maya Gokhale (Lawrence Livermore National Laboratory, USA)
Kyle Hale (Oregon State University, USA)
Stephen Olivier (Sandia National Laboratories)
Ronald Minnch (HPE)