[hpc-announce] [CFP] IEEE/SBC SBAC-PAD 2025 (Final Deadline Extension)

[Jean Luca Bez]

(Apologies if you received duplicates of this CFP)

IEEE/SBC SBAC-PAD 2025 Call For Papers
The 37th IEEE/SBC Symposium on Computer Architecture and High
Performance Computing

28-31 October, 2025
Bonito, MS, Brazil

https://urldefense.us/v3/__https://sbac-pad2025.ufms.br/__;!!G_uCfscf7eWS!Ymzp1j-8FfgQbvtcsb0l13Cumv-FDsow0QOqN_Qlvc1aIIahUCjS3MW895sXwTc5lJmOm8Ta82Rj5hmnhhh76w$ 

SBAC-PAD is an annual international conference series, which presents
the latest trends, current research and developments, and novel tools
and applications in the fields of Computer Architecture,
High-Performance Computing, and Parallel and Distributed Computing
technologies. SBAC-PAD is open to industry, faculty, researchers,
practitioners, and undergraduate and graduate students from around the
world. Its scientific program is composed of high-quality submitted
papers, selected by a thorough peer review process, and invited talks
from renowned researchers.

Important dates

Abstract submission deadline:
June 9th, 2025 (AoE)

Paper submission deadline:
July 7th, 2025 (AoE – Hard)
no previous abstract submission needed

Rebuttal period:
August 14th – August 18th, 2025

Author notification:
August 25th, 2025

Camera-ready submission:
September 22nd, 2025

- Application-specific systems;
- Architecture and programming support for emerging domains: (Big
Data, Deep Learning, Machine learning, Cognitive Systems);
- Artificial intelligence and machine learning methods for CA and
HPDC, and CA and HPDC for Artificial intelligence applications;
- Benchmarking, performance modeling, analysis, and evaluation;
- Blockchain and distributed ledgers
- Cloud, cluster, and edge/fog computing systems;
- Data-intensive workloads and tools;
- Data management, storage, and I/O;
- Embedded and pervasive systems;
- GPUs, FPGAs, and accelerator architectures;
- Languages, compilers, models and tools for parallel and distributed
programming;
- Modeling and simulation methodologies;
- Operating systems and virtualization;
- Parallel and distributed systems, algorithms, models, and applications;
- Power and energy-efficient systems;
- Predictive models to improve performance of scientific applications
- Processing-in-memory or near-data processing technologies
- Processor, cache, memory, storage, and network architecture;
- Real-world applications and case studies;
- Reconfigurable, resilient, and fault-tolerant systems;
- Security and privacy in CA and HPDC;
- Workflow systems.

Authors are invited to submit original manuscripts to one of five
tracks that address challenges in any of the following areas related
to the fields of Computer Architecture (CA) and High-performance and
Distributed Computing (HPDC). Topics of interest include (but are not
limited to):

Paper submission

Papers submitted to SBAC-PAD 2025 must present original research
results and must not have been published or concurrently be submitted
anywhere else. Submissions should be made via the JEMS system
(https://urldefense.us/v3/__https://jems3.sbc.org.br/sbac-pad2025__;!!G_uCfscf7eWS!Ymzp1j-8FfgQbvtcsb0l13Cumv-FDsow0QOqN_Qlvc1aIIahUCjS3MW895sXwTc5lJmOm8Ta82Rj5hkPtSOvcg$ ).

Paper submissions must be in English, have 10 pages maximum (excluding
the references),  and follow the IEEE conference manuscript formatting
guidelines for double-column text using a single-spaced 10-point font
on 8.5 × 11-inch pages. Templates are available from
https://urldefense.us/v3/__http://www.ieee.org/conferences/publishing/templates.html__;!!G_uCfscf7eWS!Ymzp1j-8FfgQbvtcsb0l13Cumv-FDsow0QOqN_Qlvc1aIIahUCjS3MW895sXwTc5lJmOm8Ta82Rj5hkb_kiS-g$ . Papers that
do not meet these requirements might be rejected without a review. To
be published in the conference proceedings and to be eligible for
publication at the IEEE Xplore, one of the authors must register at
the full rate and present his/her work at the conference.

The SBAC-PAD 2025 submissions will undergo a double-anonymized review
process, where reviewers will not know the authors' identities, and
vice-versa. Therefore, authors should “anonymize” their submission by
adopting the following guidelines, otherwise papers will be rejected
without review:
- Authors cannot include their names, affiliations, funding sources,
or acknowledgments in any part of the for-review version of their
paper;
- Self-references that are relevant to the work are allowed, but they
should not appear in the text in the first person. Instead, they
should be referenced in the third person, like “Smith et al. found
that… [4].”, and;
- For the authors’ own unpublished work use anonymous citations.

CONFERENCE ORGANISATION

General Chairs

Edson Cáceres (UFMS, Brazil)
Ricardo Santos (UFMS, Brazil)
Rodolfo Azevedo (UNICAMP, Brazil)

Technical Program Co-Chairs

Cesar A. F. De Rose  (PUCRS, Brazil)
Odej Kao (TU-Berlin, Germany)

Track Chairs

System Software Track: Lucia Drummond (Federal Fluminense University,
Rio de Janeiro, Brazil)
Computer Architecture Track: José Moreira (IBM Thomas J. Watson
Research Center, USA)
Networking and Distributed Systems Track: Marco Netto (Microsoft Azure HPC, USA)
Parallel Applications and Algorithms Track: Claude Tadonki (Mines
ParisTech, France)
Performance Evaluation Track: Hans-Ulrich Heiss (TU-Berlin, Germany)