[hpc-announce] [CFP] 32nd IEEE Symposium on High-Performance Interconnects, Hot Interconnects (HotI’25)

[Artem Polyakov]

Dear colleagues!

We invite you to attend the 32nd IEEE Symposium on High-Performance
Interconnects,
Hot Interconnects (HotI’25) conference.
The conference will take place virtually from August 20 – 22, 2025

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Submissions and Schedules
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Call for Papers (https://urldefense.us/v3/__https://hoti.org/call-for-papers__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhqaMN22s$ )
Paper abstract deadline:    May 9, 2025
Submission deadline:         May 23, 2025
Notification of acceptance: June 20, 2025

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Hot Interconnects conference
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IEEE Hot Interconnects is the premier international forum for
researchers and developers of state-of-the-art hardware and
software architectures and implementations for
interconnection networks of all scales, ranging from multi-core,
on-chip interconnects to those within systems, clusters,
data centers, and clouds. This yearly conference is attended by
leaders in industry and academia.

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HotI’25 Theme
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** Interconnect Software: You can't touch it but you need it **
The latest advancements in photonics, chips, parallel paths, and other
cutting-edge
interconnect technologies are dazzling. However, the picture is
incomplete without
the system software needed to exploit their full potential.
This edition of Hot Interconnects will explore the underlying software
ecosystems
that empower interconnect fabrics to support a wide array of applications.

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Topics of Interest
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Contributions should focus on real experimental systems,
prototypes, or leading-edge products and their performance
evaluation. We invite paper submissions across a wide range
of topics and levels, ranging from fundamentals to the latest
advances in hot topic areas, not particularly limited to the
following:

* Systems software for communication
* Novel and innovative interconnect architectures
* Accelerator interconnects, e.g. NVLINK, Infinity Fabric
* Network software/hardware designed for AI/ML workloads
* Multi-core processor interconnects
* System-on-Chip Interconnects
* Chiplet-interconnect technologies such as UCIe and BOW
* Advanced chip-to-chip communication technologies
* Optical interconnects
* Protocol and interfaces for inter-processor communication
* Survivability and fault-tolerance of interconnects
* High-speed packet processing engines and network processors
* System and storage area network architectures and protocols
* High-performance host-network interface architectures
* High-bandwidth and low-latency I/O
* Pb/s switching and routing technologies
* Innovative architectures for supporting collective communication
* Novel communication architectures to support cloud & grid computing
* Centralized and distributed cloud interconnects
* Requirements driving high-performance interconnects
* Traffic characterization for HPC systems and commercial data centers
* Software-defined networking and software overlay networks
* Software for network bring-up, configuration and performance management
  (OpenFlow, OpenSM)
* Data Center Networking

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Paper Format
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This year we invite papers to be submitted either as regular (long) papers
(up to 10 pages) or as hot topic papers (up to 4 pages). Hot topic papers
could be positional papers, industry papers, or papers describing
hot-off-the-press breaking research results and will be judged accordingly
and independently from the regular papers.


* Papers need sufficient technical detail to judge quality and suitability
  for presentation. Submissions must conform to IEEE ethics standards:
  https://urldefense.us/v3/__https://conferences.ieeeauthorcenter.ieee.org/author-ethics/guidelines-and-policies/submission-policies/__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhyrYPNuk$ 

* Submissions should include title, author, abstract, and paper in
  double-column, for details see IEEE format:
  https://urldefense.us/v3/__https://www.ieee.org/conferences/publishing/templates.html__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhI17jPjw$ 

* Papers will be submitted electronically through EasyChair
  (https://urldefense.us/v3/__https://easychair.org/conferences?conf=hoti2025__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhRdttLts$ )
  and will undergo a single-blind review process.

* Regular papers: up to 10 pages (including technical content and figures),
  excluding references and any appendices. Appendices (if any) are limited
  to 5 pages (the limit might be extended upon committee approval in advance).
  Reproducibility appendices are encouraged but no official verification is
  provided by the HotI program committee.

* Hot topic papers: up to 4 pages (including technical content and figures)
   excluding references. Appendices are not allowed for hot topic papers.

* Materials other than the abstract, main paper body, and references
will be read
   at the committee’s discretion.

* Accepted papers will be submitted for inclusion into IEEE Xplore
subject to meeting
  IEEE Xplore’s scope and quality requirements. We plan to invite the
best papers for
  an IEEE Micro (https://urldefense.us/v3/__https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=40__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhEUM8ga0$ )
  Special issue submission.

* After a paper is accepted, the authors must follow the conference and IEEE CPS
  guidelines in publishing the paper:
  https://urldefense.us/v3/__https://www.computer.org/conferences/cps__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhlSIcOkQ$ 

** See more details on HotI’25 website: https://urldefense.us/v3/__https://hoti.org/__;!!G_uCfscf7eWS!Z89KsYzF_cj2ahHFsHqdnlu_Al4829FHRm6cHbJiYiB9KB595rNeBSXDM8Ec7KWRhr4pUZKLUjGvmldhZb9806o$ 

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Best regards, HotI'25 Organizing Committee