[hpc-announce] [CFP] IEEE Hot Interconnects 2024 - Deadline extended [May 27, 2024]

Artem Polyakov artpol84 at gmail.com
Tue May 14 22:39:39 CDT 2024 

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!!! Important Announcement - Deadline Extended !!!
Paper Abstract and Submission Deadline - May 27th, 2024
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We invite you to attend the 31st IEEE Symposium
on High-Performance Interconnects,
Hot Interconnects (HotI 2024) conference.

The conference will take place virtually from August 21 – 23, 2024
Call for Papers can be found by the link:
https://urldefense.us/v3/__https://hoti.org/call-for-papers__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOh0aw0CE$ 

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Submissions and Schedules
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Papers:                                 https://urldefense.us/v3/__https://hoti.org/call-for-papers__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOh0aw0CE$ 
Paper abstract deadline:      May 27, 2024
Submission deadline:           May 27, 2024
Notification of acceptance:   June 27, 2024

Tutorials:                                 https://urldefense.us/v3/__https://hoti.org/call-for-tutorials/__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOcblFRpk$ 
Proposals due:                       May 27, 2024
Notification of acceptance:    June 3, 2024
Materials due:                        August 2, 2024

All deadlines are Anywhere on Earth (AoE)

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Hot Interconnects conference
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IEEE Hot Interconnects is the premier international forum for
researchers and developers of state-of-the-art hardware and
software architectures and implementations for
interconnection networks of all scales, ranging from multi-core,
on-chip interconnects to those within systems, clusters,
data centers, and clouds. This yearly conference is attended by
leaders in industry and academia.

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HotI 2024 Theme
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** Can Interconnects Keep up With AI? **
The explosion of AI and workloads related to machine learning and
deep learning boggles the mind. Whether in massive data centers,
edge locations, automobiles, or consumer appliances, AI stands
to improve many tasks useful to people at work or at leisure.
The demand for GPUs, DPUs, TPUs, and IPUs taxes the ability of
their manufacturers to meet the market demand. Efficient utilization
of these xPUs requires high-speed and highly scalable interconnects.
Whether between xPUs or between an xPU and memory, data transfer
can easily become a bottleneck in computing efficiency.

In this edition of IEEE Hot Interconnects, we explore advances
in interconnection networks that alleviate this bottleneck. Solutions
including optical circuit switching, dense photonic data paths,
high-performance fabrics, and more will expand from the specialized
applications of HPC to the pervasive applications of AI and in the
process will become more affordable. This year’s HotI will thus be
captivatingly relevant.

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Keynotes
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We have three exciting keynotes by experienced industry leaders:
* Tony Chan Carusone, CTO, Alphawave Semi
* Pavan Balaji, Principal Research Scientist and Technical Lead, Meta
* Mark Baciak, CTO, NeuralFabric.ai

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Panel Discussion
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Topic: Bandwidth Scaling for AI Interconnect: More Wavelengths vs. More Fiber?
Moderator: Katharine Schmidtke, Co-Founder, Eribel Systems

Abstract:
With AI model size doubling every four months, the size of AI compute
clusters is
growing rapidly to keep up. Traditional data center front-end networks
rely on optical
interconnect for data movement with Terabits per second of connectivity and have
been doubling the data rate every 4 years. As the models grow it is
also expected
that the back-end GPU networks expand beyond the confines of the rack.

Optical interconnects will be needed at distances of tens of meters
with 10Tb/s data
transfer rates and doubling every 2 years will be expected. How should optical
interconnects best achieve this bandwidth increase and what is the
best performance
axis to push next? In this panel discussion we pose the question –
“Is it better to scale with more wavelengths or by adding more fibers?”

Join us to see if any of the panelists can convince you they have the
right approach.

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Topics of Interest
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Contributions should focus on real experimental systems,
prototypes, or leading-edge products and their performance
evaluation. We invite paper submissions across a wide range
of topics and levels, ranging from fundamentals to the latest
advances in hot topic areas, not particularly limited to the
following:

* Novel and innovative interconnect architectures
* Accelerator interconnects, e.g. NVLINK, Infinity Fabric
* Network software/hardware designed for AI/ML workloads
* Multi-core processor interconnects
* System-on-Chip (SoC) Interconnects
* Chiplet-interconnect technologies such as UCIe and BOW
* Advanced chip-to-chip communication technologies
* Optical interconnects
* Protocol and interfaces for inter-processor communication
* Survivability and fault-tolerance of interconnects
* High-speed packet processing engines and network processors
* Systems software for communication
* System and storage area network architectures and protocols
* High-performance host-network interface architectures
* High-bandwidth and low-latency I/O
* Pb/s switching and routing technologies
* Innovative architectures for supporting collective communication
* Novel communication architectures to support cloud & grid computing
* Centralized and distributed cloud interconnects
* Requirements driving high-performance interconnects
* Traffic characterization for HPC systems and commercial data centers
* Software-defined networking (SDN) and software overlay networks
* Software for network bring-up, configuration and
  performance management (e.g., OpenFlow, OpenSM)
* Data Center Networking

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Paper Format
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Papers are to be submitted either as regular, long papers (6-8 pages)
or as hot topic papers (3-4 pages). Hot topic papers could be
positional papers, industry papers, or papers describing hot-off-the-press
breaking research results, and will be judged accordingly and independently
from the regular long papers.

* Papers need sufficient technical detail to judge quality and suitability
for presentation.
* Submissions should include title, author, abstract, and paper in
double-column,
IEEE format (LaTeX and MS Word templates are available here:
https://urldefense.us/v3/__http://www.ieee.org/conferences_events/conferences/publishing/templates.html__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOsakTL5U$ ).
* Regular/Long paper limit: 6-8 pages, single-spaced, 2 columns,
excluding references.
* Hot topic paper limit: 3-4 pages, single-spaced, 2 columns,
including references.
* Accepted papers (both long and hot-topic papers) will be published in
IEEE Xplore Digital Library. We plan to invite the best papers for an
IEEE Micro special issue submission.
* Papers should be submitted electronically through:
https://urldefense.us/v3/__https://easychair.org/conferences/?conf=hoti2024__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOa7X8l3g$ 

** See more details on the HotI'24 website: https://urldefense.us/v3/__https://hoti.org/__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOBlqUI98$ 

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Financial Sponsorship
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Hot Interconnects is 100% financially sponsored by the Technical Committee for
Microprocessors and Microcomputers (TCMM) of the IEEE Computer Society.

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Sister Conferences
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Hot Chips:                                         https://urldefense.us/v3/__https://hotchips.org/__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxO5S_o130$ 
Cool Chips:                                       https://urldefense.us/v3/__http://www.coolchips.org/__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxORmEVPpE$ 
Multi-Core Systems-on-Chip:                https://urldefense.us/v3/__https://mcsoc-forum.org/__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxOM1T81_c$ 

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Social media
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To receive up-to-date information, follow us on social networks:
LinkedIn: https://urldefense.us/v3/__https://www.linkedin.com/company/hot-interconnects/__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxO3pru1Zc$ 
Twitter: https://urldefense.us/v3/__https://twitter.com/IEEEHOTI__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxO5ehSseU$ 
Facebook: https://urldefense.us/v3/__https://www.facebook.com/hoti.org__;!!G_uCfscf7eWS!fM1w0fqUGsb2Xvpl-EKCVC2JW9bqYyC74jmxyceAxzZtvEMm6_-d-d46B-KuMnCadz3jQXq-5vf8qqxO7vRb2fk$ 

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Contacts
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Send questions relating to the conference operation to the General Chair
Matthew Dosanjh and to the Vice-Chair,  Artem Polyakov at: info at hoti.org

Send questions relating to the program to the Technical Program Co-Chairs
Rohit Zambre and Sayan Ghosh at: program at hoti.org

Send questions relating to the tutorials to the Tutorial Chairs
Amanda Bienz and David Ozog at: tutorials at hoti.org

Sponsor Hot Interconnects for 2024!
Raj Channa at : sponsor at hoti.org

-- 
Best regards, Artem Y. Polyakov

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