[hpc-announce] Supercomputing Spotlights: by Christie Alappat, July 25, 2024

Erin Carson carson at karlin.mff.cuni.cz
Thu Jul 18 02:38:00 CDT 2024


Accelerating sparse iterative solvers and preconditioners using RACE
Presenter: Christie Alappat, Friedrich Alexander University
Thursday, July 25, 2024, 3:00-3:40 pm UTC (30 min talk + 10 min 
questions)
8 am PDT / 10 am CDT / 11 am EDT / 3 pm UTC / 5 pm CEST / 12 am JST

Participation is free, but registration is required
Registration link: 
https://urldefense.us/v3/__https://siam.zoom.us/webinar/register/WN_Tgb2dUwqRUeiQ0r7tUriqA?_ga=2.11379508.1822599427.1721147460-848159185.1719939054**Aregistration__;Iy8!!G_uCfscf7eWS!aXygYtrXpCOCGxOv6fkZppbOg1Vmfppp7GJ7AOWZTytC89PeezUxFb-1LiLaU9IguYQoo4HDRPLI2NTZuk1iNMOz0VRNg5g$ 


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high-performance computing (HPC) throughout our world. Presentations, 
emphasizing achievements and opportunities in HPC, are intended for the 
broad international community, especially students and newcomers to the 
field. Supercomputing Spotlights is an outreach initiative of 
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Abstract: The sparse matrix-vector multiplication (SpMV) kernel is a key 
performance-limiting component of numerous algorithms in computational 
science. Despite the kernel's apparent simplicity, the sparse and 
potentially irregular data access patterns of SpMV and its intrinsically 
low computational intensity have been challenging the development of 
high-performance implementations of sparse algorithms over decades. In 
this talk, we present methods to increase the computational intensity 
and thereby accelerate the performance of SpMV kernels. The method is 
based on the concept of levels as developed in the context of our RACE 
library framework. We demonstrate that one can typically achieve a 
speedup of 1.5-4x on a single modern Intel or AMD multicore chip for 
symmetric SpMV and matrix power kernels using this level-based approach.

After briefly introducing the optimization strategy, we apply these 
optimized kernels in iterative solvers. To this end, we discuss the 
coupling of the RACE library with the Trilinos framework and address the 
application to communication-avoiding s-step Krylov solvers, polynomial 
preconditioners, and algebraic multigrid (AMG) preconditioners. We then 
dive into the performance benefits and challenges of the RACE 
integration and show that our optimization produces numerically 
identical results and improves the total solver time by 1.3x - 2x.

Bio: Christie Louis Alappat received a master's degree with honors from 
the Bavarian Graduate School of Computational Engineering at the 
Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU). He is currently 
working as a research assistant at Erlangen National High-Performance 
Computing Center and is in the final stages of completing his doctoral 
studies under the guidance of Dr. Gerhard Wellein. His research 
interests include performance engineering, sparse matrix and graph 
algorithms, iterative linear solvers, and eigenvalue computations. He 
has received numerous awards including the 2017 Software for Exascale 
Computing Best Master Thesis Award, the 2018 Supercomputing ACM Student 
Research Competition (SRC) Award, second place in the 2019 ACM SRC grand 
finals, and the 2020 International Workshop on Performance Modeling, 
Benchmarking, and Simulation of High Performance Computer Systems Best 
Short Paper Award.


Best regards,
The SIAG/SC officers for 2024-2025
Ulrike Meier Yang (chair)
Rio Yokota (vice chair)
Hartwig Anzt (program director)
Erin Carson (secretary)


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