[hpc-announce] Extended Deadline 17 May. Workshop on Ethereogeneous High Performance Computing

[marco lapegna]

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****** EXTENDED DEADLINE AND LAST CALL FOR PAPERS   ******
******                                              ******
******                7th WORKSHOP ON               ******
******   MODELS, ALGORITHMS AND METHODOLOGIES FOR   ******
******    HYBRID PARALLELISM IN NEW HPC SYSTEMS     ******
******                  MAMHYP-24                   ******
******                                              ******
******               JOINTLY WITH THE               ******
******       15th INTERNATIONAL CONFERENCE ON       ******
****** PARALLEL PROCESSING AND APPLIED MATHEMATICS  ******
******                                              ******
******  Ostrava, Czech Rep., SEPTEMBER 8-11, 2024   ******
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MAMHYP-24 is the seventh workshop following those held in
Torun,Warsaw, Krakow, Lublin, Bialystok and Gdansk in 2011,
2013, 2015, 2017, 2019 and 2022, respectively, in conjunction
with the PPAM  conferences. Despite the progress made in the
field, developing efficient algorithms for HPC systems with
multiple forms of parallelism remains a challenging problem.

More precisely, from an architectural perspective, a
High-Performance Computing (HPC) system can be characterized
by  a hybrid multi-level structure: at the highest level,
several systems are interconnected by geographic networks
(System level); an intermediate level consists of nodes within
a single system  communicating through dedicated fast networks
or high-performance switches (Node level); finally, at the
lowest level, there are multiple computing elements, including
computing cores and graphic accelerators, sharing resources
within a single CPU (Core level).

These architectural levels exhibit distinct features,
necessitating different algorithmic development methodologies.
Consequently, the development of algorithms and scientific
software for these systems requires a judicious combination of
methodologies to address the diverse forms of parallelism
corresponding to each architectural level. The overarching
objective is to develop hybrid and hierarchical algorithms
capable of leveraging the underlying platform. Key challenges
in this domain include managing extensive degrees of
parallelism stemming from numerous computing units, addressing
the heterogeneity of these devices, and integrating various
forms of parallelism into a single algorithm. These issues are
primarily investigated to achieve exascale performance and, on
another front, to confront new forms of distributed computing
such as cloud computing, edge computing, and their
intersection with HPC.

This workshop specifically targets Models, Methodologies,
Algorithms, and Environments for harnessing all forms of
parallelism and their amalgamation at all levels within
emerging HPC systems, aiming to consolidate the current state
of knowledge in the field.


TOPICS OF INTEREST INCLUDE, BUT ARE NOT LIMITED TO:

- Hybrid and hierarchical based parallel algorithms
- Multi-core and many-core parallel computing, GPU computing
- Architecture-aware parallelization on HPC platforms
- Auto tuning techniques for heterogeneous and parallel
   environments
- Performance analysis
- Techniques for multi-/many-core platforms, NUMA
   architectures, or accelerator components
- Task scheduling and load balancing among computing elements
- Synchronization and access to shared resources
- Multilevel cache management
- Computational kernels for scientific computing and
   applications
- Performance and scalability models
- Tools and programming environments supporting efficient
   usage of multilevel parallelism.
- Resources virtualization
- High Performance cloud/edge/fog computing
- Intra/Infra Virtual machines high performance communications
   algorithms
- Fault tolerant implementation


PAPER SUBMISSION AND PUBLICATION

All rules of paper submission of the PPAM conference apply. In
particular:
- Papers will be refereed and accepted on the basis of their
   scientific merit and relevance to the Workshop topics.
- Papers presented at the Workshop will be included into the
   conference proceedings and published after the conference by
   Springer in the LNCS series.
- Before the Workshop, abstracts of accepted papers will be
   posted on this site.
- Authors should submit papers (PDF files)  using the online
   submission tool
- Papers are not to exceed 12 pages (LNCS style)


WORKSHOP ORGANIZERS

- Giuliano Laccetti (Univ. of Naples Federico II, Italy)
                     giuliano.laccetti at unina.it
- Marco Lapegna (Univ. of Naples Federico II, Italy)
                     marco.lapegna at unina.it
- Valeria Mele (Univ. of Naples Federico II, Italy)
                     valeria.mele at unina.it
- Raffaele Montella (Univ. of Naples Parthenope, Italy)
                     raffaele.montella at uniparthenope.it
- Diego Romano (National Research Council, Italy)
                     diego.romano at cnr.it


DATES

- Submission of Papers: MAY 17, 2024
- Notification of Acceptance: June 7, 2024
- Conference: September 8-11, 2024
- Camera-Ready Papers: October 31, 2024


PROGRAM COMMITTEE (tentative)

-  Javier Garcia Blas, University Carlos III, Madrid Spain
-  Sokol Kosta, Aalborg University Copenhagen, Denmark
-  Giuliano Laccetti, University of Naples Federico II, Italy
-  Marco Lapegna, University of Naples Federico II, Italy
-  Valeria Mele, University of Naples Federico II, Italy
-  Raffaele Montella, University of Naples Parthenope, Italy
-  Diego Romano, National Research Council, Italy
-  Gloria Ortega, University of Almeria, Spain
-  Lucas Szustak, Polish Academy of Sciences, Poland
-  Roman Wyrzykowski, Czestochowa University of Technology,
    Poland


JOURNAL SPECIAL ISSUES

Like the previous editions, authors of selected papers from
MAMHYP24 will be invited to submit an extended version of
their papers to a Special Issue of the journal "Concurrency
and Computation: Practice and Experiences." Other high-quality
papers that fit the Special Issue topics are also welcome for
submission.




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