[hpc-announce] (Deadline Extension) MEMSYS'23: International Symposium on Memory Systems
Chen Ding
cding at cs.rochester.edu
Thu Jul 27 08:07:32 CDT 2023
Call for Papers: MEMSYS 2023
https://www.memsys.io/call-for-papers/
The International Symposium on Memory Systems
October 02 - October 05 2023
Lorien Hotel and Spa, Alexandria, VA
EXTENDED Submission Deadline: August 8, 2023
Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology- and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges.
Areas of Interest
Previously unpublished papers containing significant novel ideas and technical results are solicited. Papers that focus on system, software, and architecture level concepts specifically memory-related, i.e. topics outside of traditional conference scopes, will be preferred over others (e.g., the desired focus is away from pipeline design, processor cache design, prefetching, data prediction, etc.). Symposium topics include, but are not limited to, the following:
Memory-system design from both hardware and software perspectives
Memory failure modes and mitigation strategies
Memory and system security issues
Memory for embedded and autonomous systems (e.g., automotive)
Operating system design for hybrid/nonvolatile memories
Technologies including flash, DRAM, STT-MRAM, 3DXP, etc.
Memory-centric programming models, languages, optimization
Compute-in-memory and compute-near-memory technologies
Data-movement issues and mitigation techniques
Interconnects to support large-scale data movement
Algorithmic & software memory-management techniques
Emerging memory technologies, their controllers, and novel uses
Interference at the memory level across datacenter applications
Issues in the design and operation of large-memory machines
In-memory databases and NoSQL stores
Post-CMOS scaling efforts and memory technologies to support them, including cryogenic, neural, and heterogeneous memories
* General Chair: Bruce Jacob, Naval Academy
* Program Chairs: Matthias Jung, University of Würzburg and Wendy Elsasser, Rambus
**Program Committee:**
Abdel-Hameed Badawy, NMSU
Jonathan Beard, Arm
Bruce Childers, University of Pittsburgh
Zeshan Chishti, Intel
Bruce Christenson, Intel
Chen Ding, University of Rochester
Ron Dreslinski, University of Michigan
David Donofrio, Tactical Computing Labs
Dietmar Fey, FAU Erlangen-Nürnberg
Maya Gokhale, LLNL
Michael Jantz, University of Tennessee
Si Hammond, NNSA
John Leidel, Tactical Computing Labs
Petar Radojkovic, BSC
Arun Rodrigues, Sandia National Labs
Robert Trout, Micron
Ke Zhang, Chinese Academy of Sciences
Marc Reichenbach, BTU Cottbus
Thomas Vogalsang, Rambus
William Wang, Arm
Important Dates:
Submission: August 8th 2023 (extended by one week)
Notification: August 28st 2023
Camera-Ready: September 4th 2023
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