[hpc-announce] 3rd Workshop on Heterogeneous Memory Systems (HMEM 2022)
Antonio J. Peña
antonio.pena at bsc.es
Mon May 16 09:48:57 CDT 2022
3rd Workshop on Heterogeneous Memory Systems (HMEM 2022)
June 27, 2022 - Virtual
Collocated with ICS2022
**Call for Participation**
Heterogeneous memory architectures have recently emerged and
revolutionized the traditional memory hierarchy. Today’s architectures
may comprise multiple memory nodes, organized in complex non-uniform
access (NUMA) topologies, whose nodes include not just DRAM, but also
die-stacked DRAM, high-bandwidth multi-channel RAM, or persistent memory.
By combining different memory technologies, heterogeneous memory
architectures allow today’s systems to take advantage of the strengths
of each technology — namely, in terms of latency, bandwidth, capacity,
persistence or cost. As a result, applications may benefit from improved
performance, energy-efficiency, and cost trade-offs.
Still, exploiting the full potential of heterogeneous memory
architectures poses significant challenges. Since heterogeneous memory
architectures introduce dramatic disruptions to the usual memory
hierarchy assumptions that have guided decades of system and software
design, we need to rethink the full system stack to embrace the new era
of memory heterogeneity.
Following a successful inaugural edition at ICS 2020, the 2nd HMEM
workshop will serve as a forum to present and discuss ongoing research
around heterogeneous memory systems. The scope of the workshop
encompasses all the layers of system and software stack, from computer
architectures, operating system, middleware, programming models, runtime
systems, tools, to applications.
Topics of interest include, but are not limited to:
Data allocation and placement in heterogeneous memories
Caching for heterogeneous memories
Software-defined far memories
New memory consistency and persistency models
Persistent data structures
Abstractions and support for failure-atomicity in persistent memory
Use cases and early experiences
Prospective authors must submit an extended abstract of up to 4 pages
through EasyChair. Extra pages can be included in a clearly marked
appendix (to be read at the discretion of the reviewers).
The extended abstract should include author names (single-bllind review)
and use the ACM proceedings template
Prospective speakers are also welcome to submit extended abstracts based
on their recent publications.
This is a traditional-style workshop without formal papers or
proceedings. The authors of accepted communications will be invited to
(optionally) upload their extended abstract (PDF) for publication on the
Submission deadline: June 3, 2022 (AOE).
Acceptance notification: June 10, 2022
Joao Barreto, INESC-ID, Universidade de Lisboa
Harald Servat, Intel
Antonio J. Peña, Barcelona Supercomputing Center (BSC)
Antonio J. Peña (PhD), Ramón y Cajal Fellow
Group Manager, Accelerators and Communications for HPC | Teaching and Research Staff
Leading Researcher, Computer Sciences Department | Computer Architecture Department
Barcelona Supercomputing Center (BSC) | Universitat Politècnica de Catalunya (UPC)
Looking for job opportunities? Open positions in my team. Please contact me.
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