[hpc-announce] CORRECTNESS 2021 at SC21 -- Call for Papers

[Cindy Rubio González]

========================================================================

                            CALL FOR PAPERS

     Fifth International Workshop on Software Correctness for HPC

                  Applications (Correctness 2021)

    In conjunction with SC21: The International Conference for High

  Performance Computing, Networking, Storage and Analysis, November 19,

       2021, St. Louis, Missouri, USA. In cooperation with IEEE TCHPC.

               https://correctness-workshop.github.io/2021/

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Dates

=====

Paper submissions due: August 9, 2021

Notification of acceptance: September 20, 2021

Camera-ready papers due (firm): October 4, 2021


Scope

=====

Ensuring correctness in high-performance computing (HPC) applications

is one of the fundamental challenges that the HPC community faces

today. While significant advances in verification, testing, and

debugging have been made to isolate software errors (or defects) in the

context of non-HPC software, several factors make achieving correctness

in HPC applications and systems much more challenging than in general

systems software: growing heterogeneity (architectures with CPUs, GPUs,

and special purpose accelerators), massive scale computations (very

high degree of concurrency), use of combined parallel programing models

(e.g., MPI+X), new scalable numerical algorithms (e.g., to leverage

reduced precision in floating-point arithmetic), and aggressive

compiler optimizations/transformations are some of the challenges that

make correctness harder in HPC. The following DOE report lays out the key

challenges and research areas of HPC correctness:

https://doi.org/10.2172/1470989

As the complexity of future architectures, algorithms, and applications

in HPC increases, the ability to fully exploit exascale systems will be

limited without correctness. With the continuous use of HPC software to

advance scientific and technological capabilities, novel techniques and

practical tools for software correctness in HPC are invaluable.

The goal of the Correctness Workshop is to bring together researchers

and developers to present and discuss novel ideas to address the

problem of correctness in HPC. The workshop will feature contributed

papers and invited talks in this area.

Topics

======

Topics of interest include, but are not limited to:

* Formal methods and rigorous mathematical techniques for correctness in
HPC

Applications

* Program synthesis techniques for testing and debugging HPC applications

* Frameworks to address the challenges of testing complex HPC applications

(e.g., multiphysics applications)

* Approaches for the specification of numerical algorithms with the goal of

correctness checking

* Error identification in the design and implementation of numerical
algorithms

using finite-precision floating point numbers

* Tools to control the effect of non-determinism when debugging and testing
HPC

software

* Scalable debugging solutions for large-scale HPC applications

* Scalable tools for model checking, verification, certification, or
symbolic

execution

* Static and dynamic analysis to test and check correctness in the entire
HPC

software ecosystem

* Predictive debugging and testing approaches to forecast the occurrence of

errors in specific conditions

* Machine learning and anomaly detection for bug detection and localization

* Correctness in emerging HPC programming models

* Analysis of software error propagation and error handling in HPC runtime

systems and libraries

* Metrics to measure the degree of correctness of HPC software

* Specifications to check the correctness of runtime systems

* Large databases of bug reports and/or reproducible test cases of HPC
software

* Benchmarks to test the effectiveness of HPC correctness tools

Proceedings

===========

We expect that the proceedings will be archived in IEEE Xplore via TCHPC.

Submissions and Format

======================

Authors are invited to submit manuscripts in English structured as
technical or

experience papers at a length of at least 6 pages but not exceeding 8 pages
of content, including everything. Submissions must use the IEEE format.


Organizers

==========

Ignacio Laguna, LLNL

Cindy Rubio-González, UC Davis

Program Committee

=================

Alper Altuntas, National Center for Atmospheric Research, USA

Allison H. Baker, National Center for Atmospheric Research, USA

John Baugh, North Carolina State University, USA

Hugo Brunie, INRIA, France

Patrick Carribault, CEA-DAM, France

Charisee Chiw, Galois, Inc, USA

Ganesh Gopalakrishnan, University of Utah, USA

Geoffrey C. Hulette, Sandia National Laboratories, USA

Michael O. Lam, James Madison University, USA

Jackson Mayo, Sandia National Laboratories, USA

Boyana Norris, University of Oregon, USA

Joachim Protze, RWTH Aachen University, Germany

Tristan Ravitch, Galois, USA

Emmanuelle Saillard, INRIA Bordeaux, France

Markus Schordan, Lawrence Livermore National Laboratory, USA

Tristan Vanderbruggen, Lawrence Livermore National Laboratory, USA


Contact

=======

Please address workshop questions to Ignacio Laguna (ilaguna at llnl.gov)

and/or Cindy Rubio-González (crubio at ucdavis.edu).


-- 
Cindy Rubio González
Faculty Assistant to the Dean for Diversity and Inclusion, College of
Engineering
Associate Professor of Computer Science
University of California, Davis
http://web.cs.ucdavis.edu/~rubio/