[hpc-announce] Call for Papers - MCHPC'20 at SC20: Workshop on Memory Centric High Performance Computing

[Yonghong Yan]

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                                                Call for Papers

           MCHPC'20: Workshop on Memory Centric High Performance Computing
                 held in conjunction with SC20: The International
Conference on
                 High Performance Computing, Networking, Storage and
Analysis
                 and in cooperation with IEEE TCHPC

           Location: Georgia World Congress Center, Atlanta, GA
          Time/Date: 9:00AM - 5:30PM, Sunday, November 15, 2020

                               https://passlab.github.io/mchpc/mchpc2020

                               Submission Deadline: September 2 2020 AOE

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The MCHPC workshop aims to bring together computer and computational
science researchers, from industry, government labs and academia, concerned
with the challenges of efficiently using existing and emerging memory
systems for high performance computing. The term performance for memory
system is general, which include latency, bandwidth, power consumption and
reliability from the aspect of hardware memory technologies to what it is
manifested in the application performance. The topics of interest for the
MCHPC workshop include, but are not limited to:
• The challenges and software and hardware solutions of using 3-D stack
memory, NVDIMM, memristor and other processor/compute-in-memory technology.
• Programing interfaces or language extensions that improve the
programmability of using emerging memory technologies and systems.
• Compiler and runtime techniques for optimizing data layout, movement and
consistency enforcement for latency hiding and for improving bandwidth
utilization and energy consumption of memory systems.
• Enhancement or new development for operating systems, storage and file
systems, and I/O system that address existing and emerging memory systems.
• Modeling, evaluation, and case study of memory system behavior and
application performance that reveal the limitation and characteristics of
existing memory systems.
• Application development and optimization for memory architecture and
technologies.
Important Dates

• Submission Deadline -- September 2 2020 AoE
• Notifications -- September 29 2020
• Camera Ready Papers -- October 13 2020 (Hard deadline)
• November 15th 2020 - Workshop

Submission:
Authors are invited to submit manuscripts in English structured as
technical papers up to 8 pages or as short papers up to 5 pages, both of
letter size (8.5in x 11in) and including figures, tables, and references.
Submissions not conforming to these guidelines may be returned without
review. Your paper should be formatted using IEEE conference format which
can be found from https://www.ieee.org/conferences/publishing/templates.html.
The workshop also encourage submitters to include transparency and
reproducibility information, using Transparency and Reproducibility
Initiative for SC'20 Technical Papers as guideline.

All manuscripts will be peer-reviewed and judged on correctness,
originality, technical strength, and significance, quality of presentation,
and interest and relevance to the workshop attendees. Submitted papers must
represent original unpublished research that is not currently under review
for any other conference or journal. Papers not following these guidelines
will be rejected without review and further action may be taken, including
(but not limited to) notifications sent to the heads of the institutions of
the authors and sponsors of the conference. Submissions received after the
due date, exceeding length limit, or not appropriately structured may also
not be considered. At least one author of an accepted paper must register
for and attend the workshop. Authors may contact the workshop organizers
for more information.

Papers should be submitted electronically at:
https://submissions.supercomputing.org/, choose "SC20 Workshop: MCHPC'20:
Workshop on Memory Centric High Performance Computing".

The final papers will be published through IEEE TCHPC. Published
proceedings will be included in the IEEE Xplore digital library.

Organizers
• Yonghong Yan (University of North Carolina at Charlotte, yyan7 at uncc.edu)
• Ron Brightwell (Sandia National Laboratory, rbbrigh at sandia.gov)
• Xian-He Sun (Illinois Institute of Technology, sun at iit.edu)
• Maya B Gokhale (Lawrence Livermore National Laboratory, gokhale2 at llnl.gov)

Program Committee
• Ron Brightwell (Sandia National Laboratory, rbbrigh at sandia.gov)
• Yonghong Yan (University of North Carolina at Charlotte, yyan7 at uncc.edu)
• Xian-He Sun (Illinois Institute of Technology)
• Maya B Gokhale (Lawrence Livermore National Laboratory)
• …

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