[hpc-announce] [PAISE] PAISE 2020: Final Call for Papers.

Rajesh Sankaran rajesh at anl.gov
Tue Feb 18 12:41:24 CST 2020

PAISE 2020: 2nd Workshop on Parallel AI and Systems for the Edge

Held in conjunction with IPDPS 2020
Friday, 22 May 2020,
New Orleans, USA


Applications involving voluminous data but needing low-latency computation and
local feedback require that the computing be performed as close to the data
source as possible --- often at the interface to the physical world. Communication
constraints and the need for privacy-preserving approaches also dictate the need
for computing at the edge. Given the growth in such application scenarios and
the recent advances in algorithms and techniques, machine learning and inference
at the edge are unfolding and growing at a rapid pace. In support of these
applications, a wide range of hardware (CPUs, GPUs, FPGAs, ASICs) is venturing
farther away from the center, closer to the physical world. The resulting diversity
in edge-computing hardware in terms of capabilities, architectures, and programming
models poses several new challenges.

The goal of this workshop is to gather the community working in three broad areas:
1. processing -- artificial intelligence, computer vision, machine learning,
2. management -- parallel and distributed programming models for
resource-constrained and domain-specific hardware, containers, remote
resource management, runtime-system design, and cybersecurity, and
3. hardware -- systems and devices conducive to use in resource-constrained
(energy, space, etc.) applications.

The workshop will provide a critically needed opportunity to discuss the current
trends and issues, to share visions, and to present solutions.


For this workshop we welcome original work covering different aspects of:
- Edge Inference
- Hardware for Edge-computing and Machine Learning
- Energy Efficient Processors for Training and Inference
- Computer Vision at the Edge
- Cyber Security for Edge Computing
- Software and Hardware Multitenancy at the Edge
- Machine Learning Hardware
- On device machine learning algorithms
- Real-time computer vision and speech processing
- Learning-enabled IoT applications
- Distributed inferencing and learning
- 5G for Science and Edge Computing
- Programming Models for Edge Computing
- Coupling HPC to Edge Applications
- Communication and Control Strategies for Deploying and Managing Applications at the Edge

Paper Submission, Paper Style, and Proceedings:

All papers must be original and not simultaneously submitted to another journal
or conference. The papers submitted to the workshop will be peer reviewed by
three reviewers.

The following paper categories are welcome:
- Full Papers: Research papers should describe original work and be 8 or 10
pages in length.

- Short Papers: Short research papers, 4 pages in length, should contain
enough information for the program committee to understand the scope of the
project and evaluate the novelty of the problem or approach.

- Late Breaking Results and Concept Papers: Short papers, 2-3 pages. The authors
have the option of having the selected papers published or accepted as non-archival
submissions. The non-archival submissions do not preclude future publication.
Previously published work may be submitted under certain circumstances. These
papers will be presented as 8-10 min lightning-talks, and are a medium to discuss
new ideas, techniques and concepts. Please indicate the intended track in the
end of the paper.

- Emerging Platforms and Practitioner Reports: Short reports, 3-6 pages in
length, describing novel hardware and Software platforms, including initial
proof-of-concept design and implementation are welcome. Reports may also focus
on a particular aspect of technology usage in practice, or describe broad
project experiences. They may describe a particular design idea, or experience
with a particular piece of technology.

Here is a link to the workshop webpage and EasyChair CFP, which has the links
to templates for MS Word and LaTeX provided by IEEE eXpress Conference Publishing,
and also EasyChair submissions link -


Please upload your submission to EasyChair server in PDF format.
Important Dates:

- Feb 29th AOE, 2020: Submission Deadline.
- March 11th, 2020: Notification of acceptance.
- March 15th, 2020: Camera Ready Deadline.
- May 22nd, 2020: Workshop

Program Committee:

Chris Adeniyi-Jones, ARM Research, USA
Anish Arora, The Ohio State University, USA
Cristiana Bentes, Universidade do Estado do Rio de Janeiro (UERJ), Brazil
Sergio Armando Gutierrez Betancur, Universidad de Medellin, Colombia
Prasanna Balaprakash, Argonne National Laboratory, USA
Marco Brocanelli, Wayne State University, USA
Lucy Cherkasova, ARM Research, USA
Charlie Catlett, Argonne National Laboratory, USA
Ren Cooper, Lawrence Berkeley National Laboratory, USA
Nicolas Erdody, Open Parallel, New Zealand
Felipe M. G. Franca, Universidade Federal do Rio de Janeiro (UFRJ), Brazil
Nicola Ferrier, University of Chicago, USA
Dennis Gannon, Indiana University Bloomington, USA
Eric Van Hensbergen, ARM Research, USA
Sandip Kundu, University of Massachusetts Amherst, USA
Priscila Machado Vieira Lima, Universidade Federal do Rio de Janeiro, Brazil
Leandro Marzulo, Google LLC, USA
Alan Mainwaring, Intel Corporation, USA
Eric Matson, Purdue University, USA
Michael Papka, Northern Illinois University, USA
Dhrubojyoti Roy, The Ohio State University, USA
Mina Sartipi, University of Tennessee at Chattanooga, USA
Koichi Shinoda, Tokyo Institute of Technology, Japan
German Sanchez Torres, Universidad del Magdalena, Colombia
Jerry Trahan, Louisiana State University, USA
Sean Shahkarami, University of Chicago, USA
Weisong Shi, Wayne State University, USA
Ramachandran Vaidyanathan, Louisiana State University, USA
Kazutomo Yoshii, Argonne National Laboratory, USA

Workshop Organizers:

- Peter Beckman, Mathematics and Computer Science Division, Argonne National
Laboratory, USA, E-mail: beckman(at)mcs.anl.gov

- Rajesh Sankaran, Mathematics and Computer Science Division, Argonne National
Laboratory, USA, E-mail: rajesh(at)mcs.anl.gov

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