[hpc-announce] CFP - HiPEAC Workshop on Accelerated Machine Learning (AccML'20)

[Jose Cano Reyes]

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                         HiPEAC - 2020
         Workshop on Accelerated Machine Learning (AccML)

           Co-located with the HiPEAC 2020 Conference
             (https://www.hipeac.net/2020/bologna/)

                        January 20, 2020
                         Bologna, Italy
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CALL FOR CONTRIBUTIONS
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In the last 5 years, the remarkable performance achieved in a variety of application areas (natural language processing, computer vision, games, etc.) has led to the emergence of heterogeneous architectures to accelerate machine learning workloads. In parallel, production deployment, model complexity and diversity pushed for higher productivity systems, more powerful programming abstractions, software and system architectures, dedicated runtime systems and numerical libraries, deployment and analysis tools. Deep learning models are generally memory and computationally intensive, for both training and inference. Accelerating these operations has obvious advantages, first by reducing the energy consumption (e.g. in data centers), and secondly, making these models usable on smaller devices at the edge of the Internet. In addition, while convolutional neural networks have motivated much of this effort, numerous applications and models involve a wider variety of operations, network architectures, and data processing. These applications and models permanently challenge computer architecture, the system stack, and programming abstractions. The high level of interest in these areas calls for a dedicated forum to discuss emerging acceleration techniques and computation paradigms for machine learning algorithms, as well as the applications of machine learning to the construction of such systems.


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Links to the Workshop pages
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HiPEAC: https://www.hipeac.net/2020/bologna/#/schedule/sessions/7739/

Organizers: http://workshops.inf.ed.ac.uk/accml/


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Keynote: Luca Benini (ETH Zurich and U. di Bologna)
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Title: Extreme Edge AI on Open Hardware

Edge Artificial Intelligence (AI) is the new mega-trend, as privacy concerns and network bandwidth/latency bottlenecks prevent cloud offloading of AI functions in many application domains, from autonomous driving to advanced prosthetics. Hence we need to push AI toward sensors and actuators. I will give an overview of recent efforts in developing systems of-on-chips based on open source hardware and  capable of significant analytics and AI functions "at the extreme edge", i.e. within the limited power budget of traditional microcontrollers that can be co-located and integrated with the sensors/actuators themselves.  These open, extreme edge AI platforms create an exciting playground for research and innovation.

Luca Benini holds the chair of digital Circuits and systems at ETHZ and is Full Professor at the Universita di Bologna. He received a PhD from Stanford University. In 2009-2012 he served as chief architect in STmicroelectronics France.  Dr. Benini's research interests are in energy-efficient computing systems design, from embedded to high-performance. He is also active in the design of ultra-low power VLSI Circuits and smart sensing micro-systems. He has published more than 1000 peer-reviewed papers and five books. He is an ERC-advanced grant winner, a Fellow of the IEEE, of the ACM and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg award and of the  2019 IEEE TCAD Donald O. Pederson Best Paper Award.


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Other invited speakers
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Carole-Jean Wu (Facebook).
Two additional speakers from industry (Arm, Google) will be announced before the paper submission deadline.

Presentations will include ample time for interaction.


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Topics
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Topics of interest include (but are not limited to):

- Novel ML systems?: heterogeneous multi/many-core systems, GPUs, FPGAs;
- Software ML acceleration: languages, primitives, libraries, compilers and frameworks;
- Novel ML hardware accelerators and associated software;
- Emerging semiconductor technologies with applications to ML hardware acceleration;
- ML for the construction and tuning of systems;
- Cloud and edge ML computing: hardware and software to accelerate training and inference;
- Computing systems research addressing the privacy and security of ML-dominated systems.


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Submission
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Papers will be reviewed by the workshop's technical program committee according to criteria regarding a submission's quality, relevance to the workshop's topics, and, foremost, its potential to spark discussions about directions, insights, and solutions in the context of accelerating machine learning. Research papers, case studies, and position papers are all welcome.
In particular, we encourage authors to submit works-In-Progress papers: To facilitate sharing of thought-provoking ideas and high-potential though preliminary research, authors are welcome to make submissions describing early-stage, in-progress, and/or exploratory work in order to elicit feedback, discover collaboration opportunities, and generally spark discussion.

The workshop does not have formal proceedings.


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Important Dates
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Submission deadline: November 8, 2019
Notification of decision: December 6, 2019


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Organizers
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José Cano (University of Glasgow)
Valentin Radu (University of Edinburgh)
Marco Cornero (DeepMind)
Albert Cohen (Google)
Olivier Temam (DeepMind)
Alex Ramirez (Google)