[hpc-announce] Final Reminder - MEMSYS 19 - 5th Annual IEEE ACM Conference - Call for Papers

MEMSYS smiley at memsys.co
Wed May 8 13:34:20 CDT 2019

Final Reminder --The International Symposium on Memory Systems - Sept. 30 - Oct. 3 in Arllington, DC - This year marks our 5th anniversary!

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The final deadline is approaching to this year’s MEMSYS conference: papers are due at the end of this month, with a one-week extension to the first week of June. Submissions are now open at https://memsys.us15.list-manage.com/track/click?u=cccfa5f102032c4619c949763&id=3cd08c6fb1&e=971b0dc41e.

Paper submissions may be any length, from 1-16 pages. We’re looking for insights and ideas that can be shared through presentation with our community. The final publication version (for inclusion in the ACM Digital Library) may be expanded after the deadline.

This year’s conference will be held at the Westin in Arlington, VA, and the room block is now open. To make your room-block reservations click here to make your reservation (https://memsys.us15.list-manage.com/track/click?u=cccfa5f102032c4619c949763&id=083947097a&e=971b0dc41e) .

We are excited for you to join us at our Fifth Annual IEEE/ACM conference this year! Please contact me if you have any questions or need any assistance getting registered.

Best regards,
smiley at memsys.co (mailto:smiley at memsys.co)

** -- Final Reminder --

5th Annual IEEE ACM MEMSYS Conference
September 30 - October 3, 2019 • Arlington, VA

Memory-device manufacturing, memory-architecture design, and the use of memory technologies by application software all profoundly impact today’s and tomorrow’s computing systems, in terms of their performance, function, reliability, predictability, power dissipation, and cost. Existing memory technologies are seen as limiting in terms of power, capacity, and bandwidth. Emerging memory technologies offer the potential to overcome both technology- and design-related limitations to answer the requirements of many different applications. Our goal is to bring together researchers, practitioners, and others interested in this exciting and rapidly evolving field, to update each other on the latest state of the art, to exchange ideas, and to discuss future challenges. Please visit memsys.io for more information.

** Important Dates
31 May, 2019 (+7 days)*

31 July, 2019

15 August, 2019

* Automatic 1-week submission extension

** Submission Formats
1–2 page Abstracts 5–6 page Position Papers 10+ page Research Papers Conference paper format, ACM 'sigconf' proceedings template, blind submission (no authors listed), up to 16 pages long.

** Keynotes & Panelists
Shekhar Borkar, Qualcomm
Steve Pawlowski, Micron
James Ang, PNNL
Jonathan Beard, Arm
Keren Bergman, Columbia
Maya Gokhale, LLNL
Michael Heroux, Sandia Nat. Labs
Hemant Rotithor, Arm
Kenneth Wright, Rambus

** Organizers
Bruce Jacob, University of Maryland
Kathy Smiley, Memory Systems

Ameen Akel, Micron
Abdel-Hameed Badawy, NMSU
Ishwar Bhati, Intel
Bruce Childers, University of Pittsburgh
Zeshan Chishti, Intel
Bruce Christenson, Intel
Sung Woo Chung, Korea University
Stephan Diestelhorst, Arm
Chen Ding, University of Rochester
David Donofrio, Berkeley Lab
Wendy Elsasser, Arm
Dietmar Fey, FAU Erlangen-Nürnberg
Paul Gratz, Texas A&M
Xiaochen Guo, Lehigh University
Manish Gupta, NVIDIA
Michael Healy, IBM
Jian Huang, UIUC
Matthias Jung, Fraunhofer IESE
John Leidel, TactCompLabs
Edgar Leon, LLNL
Trevor Mudge, University of Michigan
J. Thomas Pawlowski, Micron
Petar Radojkovic, BSC
Arun Rodrigues, Sandia National Labs
Kevin Rudd, DoD
Charles Sobey, Channel Science
Robert Voigt, Northrop Grumman
Gwendolyn Voskuilen, Sandia Nat. Labs
Owens Walker, US Naval Academy
Norbert Wehn, U. Kaiserslautern
Noel Wheeler, DoD
Ke Zhang, Chinese Academy of Sciences

** Areas of Interest
Previously unpublished papers containing significant novel ideas and technical results are solicited. Papers that focus on system, software, and architecture level concepts specifically memory-related, i.e. topics outside of traditional conference scopes, will be preferred over others (e.g., the desired focus is away from pipeline design, processor cache design, prefetching, data prediction, etc.). Symposium topics include, but are not limited to, the following:
* Memory-system design from both hardware and software perspectives
* Memory failure modes and mitigation strategies
* Memory and system security issues
* Memory for embedded and autonomous systems (e.g., automotive)
* Operating system design for hybrid/nonvolatile memories
* Technologies including flash, DRAM, STT-MRAM, 3DXP, etc.
* Memory-centric programming models, languages, optimization
* Compute-in-memory and compute-near-memory technologies
* Data-movement issues and mitigation techniques
* Interconnects to support large-scale data movement
* Algorithmic & software memory-management techniques
* Emerging memory technologies, their controllers, and novel uses
* Interference at the memory level across datacenter applications
* Issues in the design and operation of large-memory machines
* In-memory databases and NoSQL stores
* Post-CMOS scaling efforts and memory technologies to support them, including cryogenic, neural, and heterogeneous memories

To reiterate, papers that focus on topics outside the scope of traditional architecture conferences will be preferred over others.

** Submissions and Presentations
Our primary goal is to showcase interesting ideas that will spark conversation between disparate groups—to get applications people, operating systems people, system architecture people, interconnect people and circuits people to talk to each other. We accept extended abstracts, position papers, and/or full research papers, and each accepted submission is given a 20-minute presentation time slot. All accepted papers will be published in the ACM Digital Library and IEEE Xplore.

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