[hpc-announce] Fwd: Final Call for Participation: Workshop on "Open Source Design Automation for FPGAs" (OSDA) at DATE19

Eddie Hung eddieh at ece.ubc.ca
Fri Mar 8 12:38:50 CST 2019


** F I N A L   C A L L   F O R   P A R T I C I P A T I O N **

Workshop on *Open Source Design Automation for FPGAs* (OSDA 2019)

in conjunction with the Design, Automation and Test in Europe Conference
Friday, March 29, 2019, Florence, Italy

** REGISTRATION OPEN ** https://www.date-conference.com/registration

** FINAL PROGRAMME ** https://osda.gitlab.io/#programme
6 paper talks, 5 invited speakers, 4 panellists, posters & demos;
across RISC-V, HLS, IP management, verification, and more!


FPGAs are increasingly finding themselves in huge data-centers as well as
in the hands of hobbyists. However the wide availability of these high and
low cost devices contrasts with the narrow ways in which one can access
them -- through proprietary closed-source tools and IP -- which can hamper
the realisation and deployment of novel FPGA-based applications and EDA
innovations. Open-source is a proven and prevalent success when it comes to
CPU and GPU silicon, and there are already efforts to drive reconfigurable
silicon towards the same trend.

This one-day workshop aims to bring together industrial, academic, and
hobbyist actors to explore, disseminate, and network over ongoing efforts
for open design automation, with a view to enabling unfettered research and
development, improving EDA quality, and lowering the barriers and risks to
entry for industry. These aims are particularly poignant due to the recent
efforts across the European Union (and beyond) that mandate "open access"
for publicly funded research to both published manuscripts as well as any
code necessary for reproducing its conclusions.

For more information, please see: https://osda.gitlab.io

Final Programme:
0845 - Welcome
0900 - Keynote: "PULP: An Open-Source RISC-V Based Multi-Core Platform for
In-Sensor Analytics"
   Davide Rossi (University of Bologna, IT)
1000 - Coffee Break + Demos
   * nextpnr -- a portable FPGA place and route tool
       David Shah and Eddie Hung (SymbioticEDA, AT)
   * OpenFPGA: a Complete Open Source Framework for FPGA Prototyping
       Baudouin Chauviere, Aurélien Alacchi, Edouard Giacomin, Xifan Tang
and Pierre-Emmanuel Gaillardon (University of Utah, USA)
1030 - Session 1 -- Full Papers
   * LiteX: an open-source SoC builder and library based on Migen Python DSL
       Florent Kermarrec, Sébastien Bourdeauducq, Jean-Christophe Le Lann
and Hannah Badier (Enjoy-Digital, FR)
   * On Hardware Verification In An Open Source Context
       Ben Marshall (University of Bristol, UK)
   * PyGears: A Functional Approach to Hardware Design
       Bogdan Vukobratović, Andrea Erdeljan and Damjan Rakanović
(University of Novi Sad, RS)
1130 - "LegUp High-Level Synthesis and its Commercialization"
   Jason Anderson (University of Toronto, CA)
1200 - Lunch
1245 - Panel discussion: "How does one commercialise/undertake research on
open-source EDA/IP?" More info
    Andrea Borga (Oliscience, NL)
    Uli Drepper (Red Hat, DE)
    Hipólito Guzmán (University of Seville, ES)
    Clifford Wolf (Symbiotic EDA, AT)
1330 - "VHDL Reuse: from Vendor Independence to Open Source"
   Daniel van der Schuur (ASTRON, NL)
1400 - Session 2 -- Lightning Talks
   * Enabling FPGA Domain-specific Compilers Through Open Source
       Alireza Kaviani and Chris Lavin (Xilinx Research Labs, USA)
   * Minitracer: A minimalist requirements tracer for HDL designs
       Carlos López-Melendo and Hipólito Guzmán-Miranda (University of
Seville, ES)
   * OpenFPGA: a Complete Open Source Framework for FPGA Prototyping
       Baudouin Chauviere, Aurélien Alacchi, Edouard Giacomin, Xifan Tang
and Pierre-Emmanuel Gaillardon (University of Utah, USA)
   * Draft of CERN OHL (Open Hardware Licence) v2: We need your feedback
       Tristan Gingold (CERN, CH)
   * GHDL: Present and Future
       Tristan Gingold (CERN, CH)
1430 - Coffee Break + Posters
1500 - "UVVM - The fastest growing FPGA verification methodology
   Espen Tallaksen (Bitvis, NO)
1545 - Session 3 -- Full Papers
   * PRGA: An Open-source Framework for Building and Using Custom FPGAs
       Ang Li and David Wentzlaff (Princeton University, USA)
   * An Open-source Framework for Xilinx FPGA Reliability Evaluation
       Aitzan Sari, Vasileios Vlagkoulis and Mihalis Psarakis (University
of Piraes, GR)
   * Python Wraps Yosys for Rapid Open-Source EDA Application Development
       Benedikt Tutzer, Christian Krieg, Clifford Wolf and Axel Jantsch (TU
Wien, AT)
1645 - "FuseSoC - Cores never been so much fun"
   Olof Kindgren (Qamcom Research & Technology/FOSSi Foundation, SE)
1715 - Closing Remarks
1730 - Further networking, drinks, food, and beyond...

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