[hpc-announce] Deadline Approaching - IEEE International Conference on High Performance Computing, Data, and Analytics 2019

Sat Jun 15 16:07:27 CDT 2019

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HiPC Paper Submission Deadline Approaching.

KEY DATES:
Abstract Submission:                 Friday, June 21, 2019  *Firm
Extended Deadline*
Paper Submission:                Friday, June 28, 2019  *Firm Extended
Deadline*
Easychair Submission link:   https://easychair.org/conferences/?conf=hipc2019

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HiPC 2019 CALL FOR PAPERS  *** Paper Deadline Extended ***
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26th IEEE International Conference on High Performance Computing,
Data, and Analytics
December 17-20, 2019, Hyderabad, India
https://hipc.org/

HiPC 2019 will be the 26th edition of the IEEE International
Conference on High Performance Computing, Data, Analytics and Data
Science. HiPC serves as a forum to present current work by researchers
from around the world as well as highlight activities in Asia in the
areas of high performance computing and data science. The meeting
focuses on all aspects of high performance computing systems, and data
science and analytics, and their scientific, engineering, and
commercial applications.

Authors are invited to submit original unpublished research
manuscripts that demonstrate current research in all areas of high
performance computing, and data science and analytics, covering all
traditional areas and emerging topics including from machine learning,
big data analytics and blockchain.  Each submission should be
submitted to one of the tracks listed under the two broad themes of
High Performance Computing and Data Science.

High Performance Computing tracks:

Algorithms: This track invites papers that describe original research
on developing new parallel and distributed computing algorithms, and
related advances. Examples of topics that are of interest include (but
not limited to):
* New parallel and distributed algorithms and design techniques;
* Advances in enhancing algorithmic properties or providing guarantees
(e.g., fault tolerance, resilience, concurrency, data locality,
communication-avoiding);
* Classical and emerging computation models (e.g.,
parallel/distributed models, quantum computing, neuromorphic and other
bioinspired models);
* Provably efficient parallel and distributed algorithms for advanced
scientific computing and irregular applications (e.g., numerical
linear algebra, graph algorithms, computational biology); and
* Algorithmic techniques for resource allocation and optimization
(e.g., scheduling, load balancing, resource management);

Architectures: This track invites papers that describe original
research on the design and evaluation of high performance computing
architectures, and related advances. Examples of topics of interest
include (but not limited to):
* Design and evaluation of high performance processing architectures
(e.g., reconfigurable, system-on-chip, manycores, vector processors);
* Design and evaluation of networks for high performance computing
platforms (e.g., interconnect topologies, network-on-chip);
* Design and evaluation of memory, cache and storage architectures
(e.g., 3D, photonic, Processing-In-Memory, NVRAM, burst buffers,
parallel I/O);
* Approaches to improve architectural properties (e.g., energy/power
efficiency, reconfigurable, resilience/fault tolerance,
security/privacy); and
* Emerging computational architectures (e.g., quantum computing,
neuromorphic and other bioinspired architectures).

Applications: This track invites papers that describe original
research on the design and implementation of scalable applications for
execution on parallel and distributed platforms, and related advances.
Examples of topics of interest include (but not limited to):
* Design and implementation of shared and distributed memory parallel
applications (e.g., scientific computing and industry applications,
emerging applications in IoT and life sciences - biology, medicine,
chemistry, etc.);
* Design and simulation methodologies for scaling applications on
peta- and exascale platforms (e.g., co-design approaches,
hardware/software co-design, heterogeneous and hybrid programming);
* Hardware acceleration of parallel applications (e.g., CPU/GPUs,
multi-GPU clusters, FPGA, vector processors, manycore); and
* Design of application benchmarks for parallel and distributed platforms.

Systems Software: This track invites papers that describe original
research on the design, implementation and evaluation of systems
software for high performance computing platforms, and related
advances. Examples of topics of interest include (but not limited to):
* Scalable systems and software architectures for high performance
computing (e.g., middleware, operating systems, I/O services);
* Techniques to enhance parallel performance (e.g., compiler/runtime
optimization, learning from application traces, profiling);
* Techniques to enhance parallel application development and
productivity (e.g., Domain-Specific Languages, programming
environments, performance/correctness checking and debugging);
* Techniques to deal with uncertainties, hardware/software resilience,
and fault tolerance;
* Software for cloud, data center, and exascale platforms (e.g.,
middleware tools, schedulers, resource allocation, data migration,
load balancing); and
* Software and programming paradigms for heterogeneous platforms
(e.g., libraries for CPU/GPU, multi-GPU clusters, and other
accelerator platforms);

Data Science tracks:

Scalable Algorithms and Analytics: This track invites papers that
describe original research on developing scalable algorithms for data
analysis at scale, and related advances. Examples of topics of
interest include (but not limited to):
* New scalable algorithms for fundamental data analysis tasks
(supervised, unsupervised learning, and pattern discovery);
* Scalable algorithms that are designed to address the characteristics
of different data sources and settings (e.g., graphs, social networks,
sequences, data streams);
* Scalable algorithms and techniques to reduce complexity of
large-scale data (e.g., streaming, sublinear data structures,
summarization, compressive analytics);
* Scalable algorithms that are designed to address requirements in
different data-driven application domains (e.g., life sciences,
business, agriculture); and
* Scalable algorithms that ensure the transparency and fairness of the analysis.

Scalable Systems and Software: This track invites papers that describe
original research on developing scalable systems and software for
handling data at scale, and related advances. Examples of topics of
interest include (but not limited to):
* Design of scalable system software to support various applications
(e.g., recommendation systems, web search, crowdsourcing applications,
streaming applications)
* Design of scalable system software for various architectures (e.g.,
OpenPower, GPUs, FPGAs).
* Architectures and systems software to support various operations in
large data frameworks (e.g., storage, retrieval, automated workflows,
data organization, visualization, visual analytics,
human-in-the-loop);
* Design and implementation of systems software for distributed data
frameworks (e.g., distributed file system, virtualization, cloud
services, resource optimization, scheduling); and
* Standards and protocols for enhancing various aspects of data
analytics (e.g., open data standards, privacy preserving and secure
schemes).

One or more best paper awards will be given for outstanding contributed papers.

IMPORTANT DATES
Abstract Submission:                 Friday, June 21, 2019  *Firm
Extended Deadline*
Paper Submission:                Friday, June 28, 2019  *Firm Extended
Deadline*
Reviews for Rebuttals:         Monday, July 29, 2019
Rebuttals due:                        Monday, August 5, 2019
Initial Submission Decision:   Monday, August 19, 2019
Revisions Due:                          Friday, September 20, 2019
Author Notification:                Monday, September 30, 2019
Camera Ready:                    Monday, October 14, 2019

Manuscript Guidelines

Submitted manuscripts should be structured as technical papers and may
not exceed ten (10) single-spaced double-column pages using 10-point
size font on 8.5x11 inch pages (IEEE conference style), including
figures, tables, and references.  See IEEE style templates at this
page for details.

Electronic submissions must be in the form of a readable PDF file.
Manuscripts must be received by the published paper submission
deadline. All manuscripts will be reviewed by the Program Committee
and evaluated on originality, relevance of the problem to the
conference theme, technical strength, rigor in analysis, quality of
results, and organization and clarity of presentation of the paper.
Authors are highly encouraged to list the key contributions of their
paper. This should be in a separate paragraph in the introduction to
the paper. Please note that the review process is “single-blind”
(i.e., authors can list their names on the paper). This year we are
introducing a two-phase review process, in which the first round of
reviews will be made available to the authors for a brief rebuttal.
Based on the reviews and the rebuttal, an initial decision will be
issued. Papers will be either accepted or rejected or recommended for
a second round. Authors of papers recommended for a second round will
be allowed to revise the paper to address the comments and suggestions
made by the program committee. The revisions will undergo a second
round of review before the final notification.

Submitted papers must represent original unpublished research that is
not currently under review for any other conference or journal. Papers
not following these guidelines will be rejected without review and
further action may be taken, including (but not limited to)
notifications sent to the heads of the institutions of the authors and
sponsors of the conference. Submissions received after the due date,
exceeding length limit, or not appropriately structured may also not
be considered. Authors may contact the Program Chairs of the
respective tracks at their contact email addresses below for further
information or clarification. Notification of review decisions will be
emailed by September 30, 2019. Camera-ready papers are due by October
14, 2019. A published proceedings will be available at the conference.

At least one author of each paper must be registered for the
conference in order for the paper to be published in the proceedings.
Presentation of an accepted paper at the conference is a requirement
of publication. Any paper that is not presented at the conference will
not be included in IEEE Xplore.

Easychair Submission link:   https://easychair.org/conferences/?conf=hipc2019

Journal Special Issue: Authors of selected high quality papers in HiPC
2019 will be invited to submit extended version of their papers for
possible publication in a special issue of Journal of Parallel and
Distributed Computing.

PLEASE NOTE:
* Authors must register their paper and submit an abstract, typically
a paragraph or two, by June 21, 2019
* Authors must then submit full versions of registered papers by June 28, 2019
* All deadlines are end of day ANYWHERE ON EARTH.
* Links to EasyChair submissions:
https://easychair.org/conferences/?conf=hipc2019

PROGRAM CHAIRS
Ananth Kalyanaraman, Washington State University, USA
George Karypis, University of Minnesota, USA

PROGRAM VICE-CHAIRS
HPC Tracks:
Algorithms: Bora Uçar, CNRS and École normale supérieure de Lyon, France
Applications: Alba Cristina M.A. de Melo, University of Brasilia, Brazil
Architecture: Smruti Ranjan Sarangi, Indian Institute of Technology Delhi, India
System Software: Sriram Krishnamoorthy, Pacific Northwest National
Laboratory, USA
Data Science Tracks:
Scalable Algorithms and Analytics: Srinivasan Parthasarathy, Ohio
State University, USA
Scalable Systems and Software: Gagan Agrawal, Ohio State University, USA

Contact Information
* High Performance Computing tracks:
Ananth Kalyanaraman, Washington State University, USA, ananth at wsu.edu
* Data Science tracks:
George Karypis, University of Minnesota, USA, karypis at umn.edu

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HiPC 2019 is co-sponsored by
• IEEE Computer Society Technical Committee on Parallel Processing (TCPP)
• HiPC Education Trust, India

In cooperation with
• ACM Special Interest Group on Algorithms and Computation Theory (SIGACT)
• ACM Special Interest Group on Computer Architecture (SIGARCH)
• FIP Working Group on Concurrent Systems
• Manufacturers' Association for Information Technology (MAIT)
• National Association of Software and Service Companies (NASSCOM)