[hpc-announce] Call for Papers - MCHPC'19 at SC19: Workshop on Memory Centric High Performance Computing

Yonghong Yan yanyh15 at gmail.com
Fri Jul 5 22:02:20 CDT 2019


                                                Call for Papers

                    MCHPC'19: Workshop on Memory Centric High
Performance Computing

                           held in conjunction with SC19: The
International Conference
                               on High Performance Computing,
Networking, Storage and Analysis
                              and in cooperation with IEEE TCHPC

                          Location: Room 501, Colorado Convention
Center, Denver Colorado USA
                          Time/Date: 9:00AM - 5:30PM, Monday, November 18, 2019


                               Submission Deadline: August 23rd, 2019 AOE

The MCHPC workshop aims to bring together computer and computational
science researchers, from industry, government labs and academia,
concerned with the challenges of efficiently using existing and
emerging memory systems for high performance computing. The term
performance for memory system is general, which include latency,
bandwidth, power consumption and reliability from the aspect of
hardware memory technologies to what it is manifested in the
application performance. The topics of interest for the MCHPC workshop
include, but are not limited to:

- The challenges and software and hardware solutions of using 3-D
stack memory, NVDIMM, memristor and other processor/compute-in-memory
- Programing interfaces or language extensions that improve the
programmability of using emerging memory technologies and systems.
- Compiler and runtime techniques for optimizing data layout,
movement and consistency enforcement for latency hiding and for
improving bandwidth utilization and energy consumption of memory
- Enhancement or new development for operating systems, storage
and file systems, and I/O system that address existing and emerging
memory systems.
- Modeling, evaluation, and case study of memory system behavior
and application performance that reveal the limitation and
characteristics of existing memory systems.
- Application development and optimization for memory
architecture and technologies.

Important Dates
- Submission Deadline – Aug 23rd 2019 AoE
- Notifications – October 5th 2019
- Camera Ready Papers or Submission of Extended Journal Version -- TBD
- November 18 2019 – MCHPC’19 Workshop

Authors are invited to submit manuscripts in English structured as
technical papers up to 8 pages or as short papers up to 5 pages, both
of letter size (8.5in x 11in) and including figures, tables, and
references. Submissions not conforming to these guidelines may be
returned without review. Your paper should be formatted using sigconf
of the ACM Master Article Template from
https://www.acm.org/publications/proceedings-template.  The workshop
also encourages submitters to include reproducibility information,
using reproducibility initiatives for SC’19 Technical Papers as a
guide available from

All manuscripts will be peer-reviewed and judged on correctness,
originality, technical strength, and significance, quality of
presentation, and interest and relevance to the workshop attendees.
Submitted papers must represent original unpublished research that is
not currently under review for any other conference or journal. Papers
not following these guidelines will be rejected without review and
further action may be taken, including (but not limited to)
notifications sent to the heads of the institutions of the authors and
sponsors of the conference. Submissions received after the due date,
exceeding length limit, or not appropriately structured may also not
be considered. At least one author of an accepted paper must register
for and attend the workshop. Authors may contact the workshop
organizers for more information.

Papers should be submitted electronically at:
https://submissions.supercomputing.org using the "SC19 Workshop:
MCHPC19" form.

The final papers are planned to be published through IEEE TCHPC.
Published proceedings will be included in the IEEE Xplore digital
library. We also planned to invite selected papers for an extended
version in a journal special issue.

- Yonghong Yan (University of South Carolina, yanyh at cse.sc.edu)
- Ron Brightwell (Sandia National Laboratory, rbbrigh at sandia.gov)
- Xian-He Sun (Illinois Institute of Technology, sun at iit.edu)
- Maya B Gokhale (Lawrence Livermore National Laboratory, gokhale2 at llnl.gov)

Program Committee
- Ron Brightwell (Co-Chair, Sandia National Laboratory, rbbrigh at sandia.gov)
- Yonghong Yan (Co-Chair, University of South Carolina, yanyh at cse.sc.edu)
- Xian-He Sun (Illinois Institute of Technology)
- Maya B Gokhale (Lawrence Livermore National Laboratory)
- Mingyu Chen (Chinese Academy of Sciences)
- Bronis R. de Supinski (Lawrence Livermore National Laboratory)
- Tom Deakin (University of Bristol)
- Hal Finkel (Argonne National Laboratory and LLVM Foundation)
- Kyle Hale (Illinois Institute of Technology)
- Jeff R. Hammond (Intel Corporation)
- Dong Li (University of California, Merced)
- Scott Lloyd (Lawrence Livermore National Laboratory)
- Ivy B. Peng (Oak Ridge National Laboratory)
- Christian Terboven (RWTH Aachen University)
- Alice Koniges (Univ. of Hawaii, Maui High Performance Computing Center)

Yonghong Yan
Assistant Professor
Department of Computer Science and Engineering
University of South Carolina
Office: 2211, Storey Innovation Center (Horizon II)
Phone: 803-777-7361
Fax: 803-777-3767
Email: yanyh at cse.sc.edu

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