[hpc-announce] CFP: HIPS 2019 in conjunction with IEEE IPDPS'2019 Rio de Janeiro

Gholkar, Neha neha.gholkar at intel.com
Mon Jan 28 13:36:16 CST 2019


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The 24th International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS 2019) http://cs.vt.edu/hips2019/ May 20, 2019, Rio de Janeiro, Brazil (Co-located with IPDPS 2019)
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The 24th HIPS workshop, to be held as a full-day meeting on May 20th at the IEEE IPDPS 2019 conference in Rio de Janeiro, Brazil, focuses on high-level programming of multiprocessors, compute clusters, and massively parallel machines. Like previous workshops in the series, which was established in 1996, this event serves as a forum for research in the areas of parallel applications, language design, compilers, runtime systems, and programming tools. It provides a timely and lightweight forum for scientists and engineers to present the latest ideas and findings in these rapidly changing fields. In our call for papers, we especially encouraged innovative approaches in the areas of emerging programming models for large-scale parallel systems and many-core architectures.

HIPS 2019 accepts two types of submissions:

1. Full papers (10 pages max)
Submission deadline: Jan 31, 2019
Notification of acceptance: Feb 22, 2019
Camera-ready papers due: March 1, 2019

2. Short papers (4 pages max)
Submission deadline: Jan 31, 2019
Notification of acceptance: Feb 22, 2019 
Camera-ready papers due: March 1, 2019

Submissions are handled through the EasyChair conference management system:
https://www.easychair.org/conferences/?conf=hips2019

More information at http://cs.vt.edu/hips2019/

** Topics **

- Programming models for heterogeneous compute capabilities and deep memories
- Languages and runtime support for multi-science/coupled codes
- New programming languages and constructs for exploiting parallelism/locality
- Experience with and improvements for existing parallel languages and run-time
  environments such as MPI, OpenMP, Cilk, UPC, Co-array Fortran, X10, Chapel,
  Charm++, and OpenCL
- Parallel compilers, programming tools, and environments
- Parallelism in emerging fields such as analytics, cloud, and machine learning
- (Scalable) tools for power & performance analysis, modeling, monitoring, and
  debugging and core correctness
- OS and architectural support for parallel programming and debugging
- Software and system support for extreme scalability including fault tolerance
  and power-aware HPC
- Programming environments for heterogeneous multicore systems and accelerators
  such as GPUs, FPGAs, and MICs
- Performance portability in heterogeneous parallel programming environment
- Performance Reproducibility in HPC: tools for quantifying and minimizing
  performance variability

** Workshop Co-chairs **
Neha Gholkar, Intel - Santa Clara, CA
Changhee Jung, Virginia Tech - Blacksburg, VA

** Program Committee **
Sriram Krishnamoorthy, Pacific Northwest National Laboratory 
Devesh Tiwari, Northeastern University 
Barry Rountree, Lawrence Livermore National Laboratory 
Qingrui, Liu Xilinx Simone Atzeni, NVIDIA 
Pedro Valero-Lara, The University of Manchester 
Xu Liu, College of William and Mary
Shuaiwen Song, Pacific Northwest National Laboratory 
Bin Ren, College of William and Mary 
Seyong Lee, Oak Ridge National Laboratory 
Dongyoon Lee, Virginia Tech 
Joachim Protze, RWTH Aachen University 
Thomas Scogland, Lawrence Livermore National Laboratory 
Yun Liang, Peking University 
Ryan Grant, Sandia National Laboratories 
Tapasya Patki, Lawrence Livermore National Laboratory 
Allen Malony, University of Oregon 
Uday Khedker, IIT Bombay 
Mitsuhisa Sato, RIKEN
Mark Hoemmen, Sandia National Laboratories



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