[hpc-announce] RAW 2019 Submission deadline extended - Papers due Feb 4

[Brian Veale]

        S U B M I S S I O N   D E A D L I N E   E X T E N D E D

               26TH RECONFIGURABLE ARCHITECTURES WORKSHOP
                MAY 20-21, 2019 - RIO DE JANEIRO, BRAZIL

The 26th Reconfigurable Architectures Workshop (RAW 2019) will be held
in Rio de Janeiro in May 2019. RAW 2019 is associated with the 33rd
Annual IEEE International Parallel & Distributed Processing Symposium
(IEEE IPDPS 2019) and is sponsored by the IEEE Computer Society and the
Technical Committee on Parallel Processing. The workshop is a vibrant
forum for researchers to present ideas, results, and on-going research
on both theoretical and practical advances in Reconfigurable Computing.

A reconfigurable computing environment is characterized by the ability of
underlying hardware architectures or devices to rapidly alter (often on
the fly) the functionalities of their components and the interconnection
between them to suit the problem at hand. The area has a rich theoretical
tradition and wide practical applicability. There are several commercially
available reconfigurable platforms (FPGAs and coarse-grained devices)
and many modern applications (including embedded systems and HPC) use
reconfigurable subsystems. An appropriate mix of theoretical foundations
and practical considerations, including algorithms architectures,
applications, technologies and tools, is essential to fully exploit the
possibilities offered by reconfigurable computing. The Reconfigurable
Architectures Workshop aims to provide a forum for creative and productive
interaction for researchers and practitioners in the area.

TOPICS OF INTEREST

Hot Topics

* Configurable Cloud
* Heterogeneous Computing in Data Centers
* Accelerating Data Center Workloads
* FPGA-based Deep Learning
* Accelerating Genomic Computations
* Accelerating Data Analytics
* Reconfigurable Computing in the IoT era
* Organic Computing, Biologically-Inspired Solutions
* Applications in Finance

Architecture & CAD

* Algorithmic Techniques and Mapping
* Emerging Technologies (optical models, 3D Interconnects, devices)
* Reconfigurable Accelerators
* Embedded Systems and Domain-Specific solutions (Digital Media, Gaming,
  Automotive applications)
* FPGA-based MPSoC and Multicore
* Distributed Systems & Networks
* Wireless and Mobile Systems
* Critical issues (Security, Energy efficiency, Fault-Tolerance)

Runtime/System Management

* Runtime Reconfiguration Models
* Autonomic computing systems
* Operating Systems and High-Level Synthesis
* High-Level Design Methods (HW/SW co-design, Compilers)
* System Support (Soft processor programming)
* Runtime Support
* Reconfiguration Techniques (reusable artifacts)
* Simulation and Prototyping (performance analysis, verification tools)

PAPER SUBMISSION

Submissions should be a complete manuscript or, in special cases,
may be a summary of relevant work. Manuscripts for full papers should
not exceed 8 single-spaced, double-column pages using 10-point font
on 8.5 x 11 inch pages (IEEE conference style) including references,
figures and tables. Manuscripts for short papers should not exceed 4
single-space, double-column pages. Papers are to be submitted through
EasyChair. Submitted papers should not have appeared in or be under
consideration for another workshop, conference or journal.

Submission deadline           February 4, 2019
Decision notification            March 1, 2019
Camera-ready papers due  March 12, 2019

ORGANIZATION

Workshop Chairs
Marco D. Santambrogio, Politecnico di Milano
Diana Goehringer, TU Dresden

Program Chairs
Fernanda Lima Kastensmidt, UFRGS
Oliver Diessel, UNSW Sydney

For current and further information, refer to the RAW'19 website:
http://raw.necst.it