[hpc-announce] @ISC 2019: 4th P3MA Workshop CFP OPEN

Sunita Chandrasekaran sunisg123 at gmail.com
Fri Jan 18 19:56:46 CST 2019


*4th International Workshop on Performance Portable Programming models for
Manycore or Accelerators (P^3MA) <https://p3ma19.ornl.gov>Frankfurt,
GermanyJune 20, 2019co-located with ISC 2019 <https://www.isc-hpc.com/>
<http://www.isc-hpc.com/> Performance portable approaches and
implementations are becoming increasingly crucial for the application
developers to make the best use of modern HPC architectures. With diverging
architectural designs, it can be a challenge to develop high-level
abstractions that can expose all the rich features of the hardware to the
programmer, especially with the introduction of heterogeneous
architectures. Unfortunately if the software framework fails to expose
these features to the programmer, the end solution can place a serious
limitation to the maximum performance that can be achieved. The constant
struggle to find the optimal abstraction to give adequate control to the
programmer without overwhelming them with low level details is the key in
how well an approach is adopted. There are a number of leading approaches
designed to address these issues. These approaches include libraries,
directive-based standardized programming models such as OpenMP and OpenACC,
Kokkos, and DSLs. Although these programming approaches are evolving to
address the complexities of evolving hardware, there are still several
opportunities to improve their design and implementations that can lead to
better adaptability and easy-of-use of these approaches by application
developers. Hardware systems are taking diverse routes, some systems
continue to demonstrate heterogeneity such as Summit and Sierra and some
not so much such as Riken’s or UK’s Isambard that is based on Arm
processors. This workshop will provide a forum to bring together
researchers and developers to discuss community’s proposals and solutions
to performance portability. Topics of interest for workshop submissions
include (but are not limited to): - Experience porting applications using
high-level models focused on performance portability and productivity-
Hybrid heterogeneous or many-core programming with models such as
threading, message passing, and PGAS- Continuation-style and asynchronous
task-based programming- Scientific libraries designed for performance
portability on heterogeneous systems- Experiences in implementing compilers
for performance portable programming on current and emerging architectures-
Low level communications APIs or runtimes that support manycore and
accelerator architectures- Extensions to programming models needed to
support multiple memory hierarchies, multiple devices, manycores, and
accelerators- Performance modeling and evaluation tools- Power/energy
studies- Auto-tuning or optimization strategies- Benchmarks and validation
suitesImportant Deadlines:April 03, 2019: Paper submission deadlineMay 14,
2019: Paper acceptance notificationJune 03, 2019: Workshop  ready Deadline
June 20, 2019: WorkshopJuly 15, 2019 : Camera Ready Deadline Papers
submission guidelines:Abstracts and papers need to be submitted via Easy
Chair:
<https://easychair.org/conferences/?conf=p3ma0>https://easychair.org/conferences/?conf=p3ma2019
<https://easychair.org/conferences/?conf=p3ma2019> After the reviewing
process, the accepted papers will be published in the [Springer-Verlag
Lecture Notes in Computer Science
(LNCS)](http://www.springer.com/us/computer-science/lncs
<http://www.springer.com/us/computer-science/lncs>) volumes.We only accept
paper submissions which are formatted correctly in [LNCS style]
(http://www.springer.com/us/computer-science/lncs/conference-proceedings-guidelines
<http://www.springer.com/us/computer-science/lncs/conference-proceedings-guidelines>)
(single column format) using either the LaTeX document class or Word
template. For details on the author guidelines, please refer to Springer's
website. Incorrectly formatted papers will be excluded from the reviewing
process.Papers submissions are required to be within 18 pages in the above
mentioned LNCS style. This includes all figures and references.Review
process:All submitted manuscripts will be reviewed. The review process is
not double blind, i.e., authors will be known to reviewers. All submitted
manuscripts will be reviewed. Submissions will be judged on correctness,
originality, technical strength, significance, quality of presentation, and
interest and relevance to the conference scope. Submitted papers may NOT
have appeared in or be under consideration for another conference, workshop
or journal.COMMITTEESSteering CommitteeMatthias Muller, RWTH Aachen
University, GermanyBarbara Chapman, Stony Brook University, USAOscar
Hernandez, ORNL, USADuncan Poole, OpenACC, USATorsten Hoefler, ETH,
ZurichMichael Wong, Codeplay Software Ltd, CanadaMitsuhisa Sato, Riken,
JapanMichael Klemm, Intel, GermanyKuan-Ching Li, Providence University,
TaiwanSimon McIntosh-Smith, University of Bristol, EnglandProgram
ChairsSunita Chandrasekaran, University of Delaware, USA (email
<schandra at udel.edu>)Swaroop Pophale, Oak Ridge National Lab, USA (email
<pophaless at ornl.gov>)Arghya ‘Ronnie’ Chatterjee, Georgia Institute of
Technology (email <http://arghya@gatech.edu, chatterjeea at ornl.gov>)Program
CommitteeFerrol Aderholdt, Middle Tennessee State University, USASridutt
Bhalachandra, Argonne National Laboratory, USAKyle Friedline, University of
Delaware, USAAxel Huebl, Technische Universität Dresden, GermanyAdrian
Jackson, The University of Edinburgh, UKGabriele Jost,  NASA Ames Research
Center/Supersmith, USAAndreas Knüpfer, Technische Universität Dresden,
GermanyJohn Leidel, Texas Tech University, USAKelvin Li, IBM, CanadaPiotr
Luszczek, University of Tennessee Knoxville, USANaoya Maruyama, Lawrence
Livermore National Laboratory, USAJohn Pennycook, IntelSuraj Prabhakaran,
Intel GmbH, GermanyRobert Searles, University of Delaware, USARay Sheppard,
Indiana University Bloomington, USAShuaiwen Song, Pacific Northwest
National Laboratory, USAXiaonan Tian, NVIDIA, USAAntonino Tumeo,
Politecnico di Milano, ItalyVeronica Larrea Vergara, Oak Ridge National
Laboratory, USACheng Wang, University of Houston, USARengan Xu, Dell EMC,
USAQuestions?  Please contact one of the program chairs.*
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