[hpc-announce] DEADLINE APPROACHING: 28th HCW Workshop; collocated with IPDPS 2019

[Mohsen Amini]

Call for Papers:

*28th Heterogeneity in Computing Workshop (HCW; collocated with IPDPS 2019)*

http://hcw.oucreate.com/
<https://urldefense.proofpoint.com/v2/url?u=http-3A__hcw.oucreate.com_&d=DwMFaQ&c=qKdtBuuu6dQK9MsRUVJ2DPXW6oayO8fu4TfEHS8sGNk&r=13oVr42D0sl_6sWR2pctfg&m=wsuRngqLmqjiCvA1RqqXNS-ph45P_iOjjhDznZUXIVI&s=fLUkUdRmx_GPqCjR2rDmfc8LP9Q5WvWZV3JvAEe86aA&e=>



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The Twenty Eighth International Heterogeneity in Computing Workshop (HCW),
May 20, 2019
Collocated with 33rd IEEE IPDPS 2019, May 20 - 24, 2019, Rio de Janeiro,
Brazil

Sponsored by the IEEE Computer Society, through the Technical Committee on
Parallel Processing (TCPP), and by the U.S. Office of Naval Research (ONR).

SUMMARY

Most modern computing systems are heterogeneous, either for organic reasons
because components grew independently as it is the case in desktop grids,
or by design to leverage the strength of specific hardware as it is the
case in accelerated systems. In any case, all computing systems have some
form of hardware or software heterogeneity that must been managed,
leveraged and understood. HCW is a venue to discuss and innovate in all
theoretical and practical aspects of heterogeneous computing:
programmability, modeling, design, applications, efficient utilization,
algorithms, etc.

TOPICS

Topics of interest include but are not limited to the following areas:

Heterogeneous multicore systems and architectures: Design, exploration, and
experimental analysis of heterogeneous computing systems such as GPGPUs,
heterogeneous systems-on-chip (SoC), accelerator systems (e.g., Xeon Phi),
FPGAs, big.LITTLE, and application-specific architectures.

Heterogeneous parallel and distributed systems: Design and analysis of
computing grids, cloud systems, hybrid clusters, datacenters,
geo-distributed computing systems, and supercomputers.

Algorithms for heterogeneous systems: Parallel algorithms for solving
problems on heterogeneous systems (multicores, hybrid clusters, grids or
clouds); strategies for scheduling and allocation on heterogeneous 2D and
3D multicore architectures; scheduling and resource management on
large-scale and parallel heterogeneous systems.

Deep-memory hierarchies: Design and analysis of memory hierarchies with
SRAM, DRAM, Flash/SSD and HDD technologies; NUMA architectures; cache
coherence strategies; novel memory systems such as phase-change RAM,
magnetic (e.g., STT) RAM, 3D Xpoint/crossbars, and memristors.

On-chip and off-chip network architectures: Network-on-chip (NoC)
architectures and protocols for heterogeneous multicores and heterogeneous
applications; energy, latency, reliability, and security optimizations for
NoCs; off-chip (chip-to-chip) network architectures and optimizations;
large scale parallel and distributed network design, evaluation, and
optimizations.

Programming models and tools: Programming paradigms and tools for
heterogeneous systems; middleware and runtime systems;
performance-abstraction tradeoff; interoperability of heterogeneous
software environments; workflows; dataflows.

Modeling, characterization, and optimizations: Performance models and their
use in the design of parallel and distributed algorithms for heterogeneous
platforms, characterizations and optimizations for improving the time to
solve a problem (throughput, latency, runtime), modeling and optimizing
electric consumption (power, energy); modeling for failure management
(fault tolerance, recovery, reliability); modeling for security in
heterogeneous platforms.

Applications on heterogeneous systems: Case studies; confluence of Big Data
systems and heterogeneous systems; data-intensive computing; deep learning;
scientific computing.


*IMPORTANT DATES*
*Paper submission: January 24, 2019
*Author notification: February 27, 2019
*Camera Ready: March 14, 2019

PAPER SUBMISSIONS

Submissions will be done through the EasyChair. The page limit is 12 pages
(papers can range from 6 to 12 pages). Please visit the HCW 2019 website (
http://hcw.oucreate.com/
<https://urldefense.proofpoint.com/v2/url?u=http-3A__hcw.oucreate.com_&d=DwMFaQ&c=qKdtBuuu6dQK9MsRUVJ2DPXW6oayO8fu4TfEHS8sGNk&r=13oVr42D0sl_6sWR2pctfg&m=wsuRngqLmqjiCvA1RqqXNS-ph45P_iOjjhDznZUXIVI&s=fLUkUdRmx_GPqCjR2rDmfc8LP9Q5WvWZV3JvAEe86aA&e=>)
for instructions on how to submit.

TECHNICAL PROGRAM COMMITTEE

John Antonio, University of Oklahoma, USA (TPC Chair)
Mohsen Amini, University of Louisiana Lafayette, USA (Publicity Chair)
Ioana Banicescu, Mississippi State University, USA
Louis-Claude Canon, Université de Franche-Comté, France
Florina M. Ciorba, University of Basel, Switzerland
Daniel Cordeiro, University of São Paulo, Brazil
Matthias Diener, University of Illinois at Urbana-Champaign, USA
Ryan Friese, Pacific Northwest National Laboratory, USA
Domingo Gimenez, University of Murcia, Spain
Nicolas Grounds, MSCI, Inc., USA
Krishna Kavi, University of North Texas, USA
Alexey Lastovetsky, University College Dublin, Ireland
Hatem Ltaief, KAUST, Saudi Arabia
Dana Petcu, West University of Timisoara, Romania
Sridhar Radhakrishnan, University of Oklahoma, USA
Achim Streit, Karlsruhe Institute of Technology, Germany
François Tessier, Swiss National Supercomputing Center, Switzerland
Samuel Thibault, LaBRI, Université Bordeaux, France
Devesh Tiwari, Northeastern University, USA

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