[hpc-announce] CFP: 1st Workshop on Legacy Software Refactoring for Performance (co-held with ISC19)
mohamed.attia at aist.go.jp
Mon Jan 7 00:50:08 CST 2019
First International Workshop on Legacy Software Refactoring for Performance (REFAC 2019)
CALL FOR PAPERS
The First International Workshop on Legacy Software Refactoring for Performance (REFAC 2019) will be held in conjunction with The ISC High Performance Conference (ISC 2019), https://www.isc-hpc.com
Messe Frankfurt, Frankfurt, Germany June 16-20 2019
Final submission Deadline: April 18, 2019
SCOPE AND OBJECTIVES
The first International Workshop on Legacy Software REFACtoring for Performance is the first event of its kind that is dedicated to the much-needed shift in focus from hardware to software to achieve performance gains. Modernizing hardware has too long been the primary method of accelerating legacy software, and close to half of the expected performance improvement in legacy codes can be attributed to improve processor technology. More than half of this improvement was based on Moore’s law and its observation that transistors will continue to become smaller every few (originally two) years. The remaining hardware improvements came from architectural innovations, such as deeper cache hierarchies, the migration to more exotic architectures (e.g. GPUs), or the utilization of larger and wider vector-units (SIMD), as well as scaling the HPC systems up by giving them more processors and cores. Unfortunately, we are no longer seeing the consistent technology scaling that Gordon Moore observed. Instead, the technology scaling has significantly slowed down, and is expected to continue only for a few more years. Consequently, in the so-called Post-Moore era, the "performance road" forks three-ways, yielding the following alternatives: (1) architectural innovations will attempt to close the performance gap, and an explosion of diverging architectures tailored for specific science domains will emerge, (2) alternative materials and technologies (e.g. non-CMOS technologies) allow the spirit of Moore’s law to continue for a foreseeable future, or (3) we abandon the von-Neumann paradigm together and move to a neuromorphic or quantum-like computer (which, in time, might or might not become practical). Independent on what direction we will end up taking in the future, the following will hold: software and algorithmic optimization will be transferable to the first two out of the three identified directions. It is these architecture-oblivious software optimizations that are the primary scope of the proposed workshop.
The REFAC Workshop interdisciplinary topics include (but are not limited to) the following:
- All types of general-purpose processor legacy-software optimizations for HPC,
- Changes to (collective) communication algorithms or implementations to enable the use of different numerical methods (for example: Lagrangian vs. Eulerian),
- Accelerating of pre-/post-processing in scientific workflows or axillary tools used in HPC environments,
- Improved maintainability and performance through the use of existing production libraries,
- Revisiting and applying modern compiler techniques, performance analysis tools, moderate usage of OpenMP pragmas, etc., for performance gains,
- Manual code refactoring, such as loop transformations or changing of data structures, to acknowledge the shifting ratio in memory vs. compute capabilities of modern architectures, and
- Using approximate computing, mixed precision, or adaptive precision wherever possible.
INSTRUCTIONS FOR PAPER SUBMISSIONS
You are invited to submit original and unpublished research works on above topics. Submitted papers must not have been published or simultaneously submitted elsewhere. The submitted paper must not exceed 10 pages (inclusive of figures and references) and must be formatted according to the Springer LNCS (Lecture Notes in Computer Science) rules. Guidelines and templates can be found at the URL: http://www.springer.com/it/computer-science/lncs/conference-proceedings-guidelines
To submit a paper, please use the link to EasyChair (starting from April 1.) which will be posted on: https://refac-ws.gitlab.io/2019/ under the Submission tab.
Only papers submitted through the electronic system and strictly adhering to the relevant format will be considered for reviewing and publication.
If you have any questions about paper submission or the workshop, please contact the workshop organizers.
April 18, 2019: Deadline for paper submission
May 10, 2019: Notification of Acceptance.
May 31, 2019: Submission deadline for the camera-ready version
June 16-20, 2019: ISC 2019 Conference
AIST/Tokyo Open Innovation Laboratory, Tokyo, Japan
Email: mohamed.attia at aist.go.jp
Tokyo Institute of Technology, Tokyo, Japan
Email: domke.j.aa at m.titech.ac.jp
Tokyo Institute of Technology, Tokyo, Japan
Email: artur.podobas at gmail.com
Technical Program Committee:
Andreas Knüpfer ZIH, TUD
Anshu Dubey ANL, U. Chicago
Barna Bihari LC (LLNL)
Bernd Mohr JSC, FZJ
Dali Wang CCSI, ORNL
Daniel Molka DLR
Didem Unat Koç University
Guido Juckeland HZDR
Hisashi Yashiro RIKEN-CCS
Saurabh Chawdhary ANL
Seyong Lee ORNL
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