[hpc-announce] CFP: WPMVP 2020 Extended Deadline

Eitzinger, Jan jan.eitzinger at fau.de
Mon Dec 2 02:53:11 CST 2019

WPMVP 2020:  6th Workshop on Programming Models for SIMD/Vector Processing
In conjunction with the 25st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2020)
San Diego, California, United States, Feb 22, 2020



Sat 7 Dec 2019: Extended paper submission deadline
Fri 20 Dec 2019: Notification of acceptance

SIMD processing is still a main driver of performance in general-purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be explicitly utilized by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and icpc are just examples for many choices available. Additionally, established optimizing compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions. Recent developments include the introduction of 512-bit SIMD units in general purpose processors (AVX512) and new innovations as the Scalable Vector Extension (SVE) for the ARMv8-A architecture or the NEC SX Aurora TSUBASA vector processors.

The purpose of this workshop is to bring together practitioners and researchers from academia and industry to discuss issues, solutions, and opportunities in enabling application developers to effectively exploit SIMD/vector processing in modern processors. We seek submissions that cover all aspects of SIMD/vector processing.  Topics of interest include, but are not restricted to:
* Programming models for SIMD/vector processing
* C/C++/Fortran extensions for SIMD (e.g., OpenMP, OpenACC, OpenCL, SIMD intrinsics)
* New data parallel or streaming programming models for SIMD
* Exploitation of SIMD/vector in Java, scripting languages, and domain-specific languages ?
* Compilers & tools to discover and optimize SIMD parallelism
* Case study, experience report, and performance analysis of SIMD/vector applications
* Design of algorithms especially suited to SIMD/vector architectures

Submitted papers must be no more than 8 pages in length. Authors are encouraged to use the ACM two-column format at http://www.sigplan.org/authorInformation.htm. Each submission will receive at least three reviews from the technical program committee. The workshop uses double-blind reviews, which means that author identities are concealed.

Deadline: 7. December 2019
Author notification: 20. December 2019

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