[hpc-announce] Deadline Extended: International Workshop on Performance, Portability and Productivity in HPC (P3HPC)
dwdoerf at lbl.gov
Tue Aug 20 16:09:32 CDT 2019
*** Note: Submission deadline has been extended to September 2nd, 11:59pm UTC-12 ***
The International Workshop on Performance, Portability and Productivity in HPC (P3HPC) provides a forum for researchers and application developers to discuss their successes and failures in tackling the compelling problems that lie at the intersection of performance, portability and productivity (P3).
We are particularly interested in research that addresses the complexities of real-life applications and/or realistic workloads, the composability challenges arising from the use of bespoke solutions, and the desire to “future-proof” applications in the long term. The topic of P3 touches on many aspects of HPC software development, and we expect the workshop program to reflect a wide range of experiences and perspectives, including those of compiler, language and runtime experts; performance engineers; and domain scientists.
Topics of Interest
Authors are invited to submit novel research from all areas concerned with performance, portability, and productivity. Topics of interest include, but are not limited to:
- Extensions to HPC languages (e.g. C/C++, Fortran), libraries and runtimes
- Directives, libraries, domain-specific languages, and other abstractions
- Algorithmic and application development techniques
- Techniques specifically designed for use with legacy codes
- Techniques for preparing applications for future architectural changes
- Techniques for measuring and evaluating the success of P3 approaches
- Case studies using state-of-the-art P3 tools and techniques
- May 31: Submissions Open
- September 2: Submission Deadline
- September 23: Author Notification
- October 11: Camera-Ready Submissions
- November 22: P3HPC Workshop
Authors are invited to submit original papers of no more than 10 pages, including tables, figures, and your appendices, but not including references nor the reproducibility appendix. Papers must be at least 6 pages long, not including references and the reproducibility appendix. All submissions should be formatted according to the IEEE Conference Proceedings format (see https://www.ieee.org/conferences/publishing/templates.html).
Papers should be submitted electronically via Linklings: https://submissions.supercomputing.org/?page=Submit&id=SC19WorkshopP3HPCSubmission&site=sc19
Full papers will be published in the IEEE Xplore digital archive in collaboration with IEEE TCHPC.
The P3HPC workshop will follow a reproducibility initiative similar to SC technical papers: authors are encouraged to submit an appendix of no more than two pages detailing available artifacts and any steps taken to increase the trustworthiness of their results (see https://collegeville.github.io/sc-reproducibility/ArtifactDescriptionAppendixTemplate.html).
The nature of performance portability involves demonstrated performance across multiple architectures, hence authors should describe artifact components across all architectures employed, such as compiler, runtime and application configurations. Authors should clearly document and explain the reasoning behind such configuration differences, to assist future researchers seeking to reproduce their experiments on future architectures.
For more information, please visit the P3HPC website at: https://p3hpc2019.lbl.gov.
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