[hpc-announce] CFP: IXPUG Workshop ISC2019

Taisuke Boku taisuke at cs.tsukuba.ac.jp
Fri Apr 5 18:43:02 CDT 2019

Dear Kai Cheung,

When can you distribute the announcement to HPC ML?
The deadline is reaching and we like to share it ASAP. Thank you. 

Best regards,
taisuke at cs.tsukuba.ac.jp
(from iPhone)

2019/04/05 16:44、Taisuke BOKU <taisuke at cs.tsukuba.ac.jp>のメール:

>                        CALL FOR PAPERS
>                     IXPUG Workshop ISC2019
>         https://www.ixpug.org/events/isc19-ixpug-workshop
>                         June 20th, 2019
>                      Frankfurt Marriott Hotel
>                    in Conjunction with ISC2019
> Overview:
> IXPUG - Intel eXtreme Performance Users Group is a user's community
> for extreme performance research and industry activities based on Intel
> products. IXPUbG organizes several workshops conjuncted with major
> international conferences/symposiums on high performance computing over
> the world. For ISC2019 held in Frankfurt Messe, IXPUG Workshop will be
> held as a part of ISC2019 on the last day of conference which is dedicated
> as Workshop Day.
>  The workshop will bring together software developers, scientists,
> academia, and industry luminaries to share learnings around the
> integration and use of FPGA devices in HPC, Data Analytics, and
> Artificial Intelligence (Machine Learning and Deep Learning) workloads
> in Intel-based HPC systems. The workshop will cover strategies for
> migrating workloads onto FPGAs, performance comparisons, aspects of
> productivity, performance portability, and scalability. Objectives of
> the workshop are:
>  1.) using FPGAs on Intel-based systems and scientific achievements,
>  2.) FPGA-related trends and challenges, and
>  3.) foster collaborations and strengthen the community of FPGA
>      enthusiasts using Intel-based HPC systems.
> Date and Place:
> June 20th (Thu) 2:00PM - 6:00PM (Workshop Day of ISC2019)
> Frankfurt Marriott Hotel (Room Megabyte), Frankfurt, Germany
> Topics of Interest (but not limited to):
> Sharing field-programmable gate array (FPGA), FPGA programming
> environments and abstraction tools, FPGA programming models,
> comparison of FPGA performance vs traditional or GPU hardware,
> embedded memory architectures, algorithmic techniques and mapping to
> FPGAs, machine learning algorithms on FPGAs, FPGA offload techniques,
> FPGA interfaces to traditional hardware, integrating FPGAs into an
> existing HPC environment.
> Keywords:
> Field-programmable gate array (FPGA), reconfigurable architectures,
> HPC, Artificial Intelligence (machine learning and deep learning)
> applications performance, FPGAs using Intel-based technology,
> benchmarking, programming environments, FPGA tools and techniques.
> Instructions for Papers
> Length rules: minimum 10 pages, maximum 18 pages.
> The accepted papers will be published in the Springer's Lecture Notes
> in Computer Science (LNCS) series.
> Manuscripts should be therefore prepared following the publisher's
> guidelines for authors, and using the publisher templates.
> Review Process:
> All submitted papers will be reviewed and we will apply the standard
> single-blind review process (i.e. the authors will be known to
> reviewers). The assignment of reviewers from the Program Committee
> avoids conflicts of interest. All submissions within the scope of the
> workshop will be peer-reviewed and will need to demonstrate quality of
> results, originality, new insights, technical strength, and ensure
> correctness. The submitted papers may not be published in or be in
> preparation for the other conferences, workshops or journals.
> Important Dates:
> - Deadline for Paper Submissions and Uploaded to IXPUG EasyChair: April 14, 2019
> - Final Paper Acceptance Notifications: April 24, 2019 (new date!)
> - Final Paper Submission and Uploaded to IXPUG EasyChair: June 19, 2019
> Submission Site:
> https://easychair.org/cfp/ISC19IXPUGWorkshop
> Publication
> Accepted papers will be published in the Springer's Lecture Notes in Computer Science (LNCS) series on ISC2019 Workshops.
> Organizers:
> Thomas Steinke, IXPUG President (Zuse Institute Berlin)
> Estela Suarez (Juelich Supercomputing Centre)
> Taisuke Boku (University of Tsukuba)
> Nalini Kumar (Intel Corporation)
> David Martin (Argonne National Laboratory)
> Review Committee:
> R. Glenn Brook, IXPUG Vice-President (University of Tennessee, Knoxville)
> Richard Gerber (NERSC/LBNL)
> Clay Hughes (SNL)
> Kent Milfeld (TACC)
> Hai Ah Nam (Los Alamos National Laboratory)
> David Keyes (KAUST)
> John Pennycook (Intel Corporation)
> Vit Vondrak (VSB-Technical University of Ostrava)
> James Lin (Shanghai Jiao Tong University)
> Fabio Affinito (CINECA)
> Vladimir Mironov (Lomonosov Moscow State University)
> Sergi Siso (UK Science & Technology Facilities Council)

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