[hpc-announce] FSP 2018: DEADLINE EXTENSION to June 17th (5th Intern. Workshop on FPGAs for Software Programmers)

[Markus Weinhardt]

Please accept our apologies if you receive multiple copies of this CfP.


===============================================================================

*C A L L   F O R   P A P E R S*

Fifth International Workshop on *FPGAs for Software Programmers* (FSP 2018)

co-located with Int. Conf. on Field Programmable Logic and Applications
August 27 - 31, 2018, Dublin, Ireland
EXTENDED SUBMISSION DEADLINE: June 17, 2018

===============================================================================

*Scope of the Workshop*
The aim of this one-day workshop is to make FPGA and reconfigurable
technology accessible to software programmers. Despite their frequently
proven power and performance benefits, designing for FPGAs is mostly an
engineering discipline carried out by highly trained specialists. With
recent progress in high-level synthesis, a first important step towards
bringing FPGA technology to potentially millions of software developers
was taken. However, to make this happen, there are still important
issues to be solved that are in the focus of this workshop.

*Topics of the FSP Workshop include, but are not limited to*
o High-level synthesis and domain-specific languages (DSLs) for FPGAs
and heterogeneous systems
o Mapping approaches and tools for heterogeneous FPGAs
o Support of hard IP blocks such as embedded processors and memory
interfaces
o Development environments for software engineers (automated tool flows,
design frameworks and tools, tool interaction)
o FPGA virtualization (design for portability, hardware abstraction, etc.)
o Design automation technologies for multi-FPGA and heterogeneous systems
o Methods for leveraging (partial) dynamic reconfiguration to increase
performance, flexibility, reliability, or programmability
o Operating system services for FPGA resource management, reliability,
security
o Target hardware design platforms (infrastructure, drivers, portable
systems)
o Overlays (CGRAs, vector processors, ASIP- and GPU-like intermediate
fabrics)
o Applications (embedded computing, signal processing, bio informatics,
big data, database acceleration, etc.) using OpenCL, OpenSPL,
Vivado-HLS, etc.
o Directions for collaborations (research proposals, networking, Horizon
2020)


*Important Dates*
Submission deadline:         June 17, 2018
Notification of acceptance:  July 9, 2018
Camera-ready final version:  July 25, 2018
Workshop:                    August 30 or 31, 2018 (to be decided)


*Submission details and publication*
Prospective authors are invited to submit original contributions (up to
eight pages) or extended abstracts describing work-in-progress or
position papers (not exceeding two pages). Details about the submission
process are available on the workshop web page (www.fsp-workshop.org).
The proceedings of this workshop containing all accepted full papers
will be published by VDE-Verlag (Germany) and indexed by IEEE Xplore.
Every accepted paper must have at least one author registered to the
workshop by the time the camera-ready paper is due.

*General Co-Chairs*
- Andreas Koch, Technical University of Darmstadt, Germany
- Markus Weinhardt, Osnabrück University of Applied Sciences, Germany

*Proceedings Chair*
- Christian Hochberger, Technical University of Darmstadt, Germany

*Program Committee*
- Hideharu Amano, Keio University, Japan
- Jason H. Anderson, University of Toronto, Canada
- Tobias Becker, Imperial College, London, UK
- João M. P. Cardoso, University of Porto, Portugal
- Sunita Chandrasekaran, University of Delaware, USA
- Paul Chow, University of Toronto, Canada
- Frank Hannig, Friedrich-Alexander Univ. Erlangen-Nürnberg, Germany
- Tobias Kenter, University of Paderborn, Germany
- Dirk Koch, University of Manchester, UK
- Miriam Leeser, Northeastern University, USA
- Janarbek Matai, COGNEX, USA
- Gael Paul, PLDA, France
- Marco Platzner, University of Paderborn, Germany
- Dan Poznanovic, Cray Inc., USA
- Gustavo Sutter, Autonomous University of Madrid, Spain
- Zain Ul-Abdin, Halmstad University, Sweden
- Rüdiger Willenberg, Mannheim University of Applied Sciences, Germany
- Daniel Ziener, University of Twente, Netherlands