[hpc-announce] ASAP 2018 Travel Awards and Keynotes
Brian Veale
veale at acm.org
Wed May 9 10:31:41 CDT 2018
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The 29th Annual IEEE International Conference on
Application-specific Systems, Architectures and Processors
ASAP 2018
Politecnico di Milano, Milano, Italy, July 10 – 12, 2018
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QUICK LINK:
Web site: http://asapconference.org/
Facebook: https://www.facebook.com/asapconference2018/
Submissions: https://easychair.org/conferences/?conf=asap2018
IMPORTANT DATES:
Conference: July 10-12, 2018
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UPDATES:
Awards
TCVLSI has graciously offered 4 student travel awards of 250 USD. If you
wish to apply for one of these grants, please send a letter to the General
Chair via e-mail. This letter should describe both your and your group's
participation in the community to-date.
Keynotes:
Speaker: Andrea Di Blas, Software Engineer at Google
Title: Google Pixel Visual Core: A Portable Domain-Specific Processor for
Computational Photography and Machine Learning
Speaker: Saman P. Amarasinghe, Professor and Associate Department Head, MIT
Title: How to Make Sparse Fast
Speaker: Michaela Blott, Principal Engineer at Xilinx
Title: Design Trade-offs for Machine Learning Solutions on Reconfigurable
Devices
Speaker: David Donofrio, Group Lead & Computer Systems Engineer at Lawrence
Berkeley National Lab
Title: How open source designs will drive the next generation of HPC Systems
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ASAP 2018
The 29th IEEE International Conference on Application-specific Systems,
Architectures and Processors 2018 will take place in Milan, Italy. The 2018
edition of the conference is organized by Politecnico di Milano.
The history of the event traces back to the International Workshop on
Systolic Arrays, organized in 1986 in Oxford, UK. It later developed into
the International Conference on Application Specific Array Processors. With
its current title, it was organized for the first time in Chicago, USA in
1996. Since then it has alternated between Europe and North-America. The
conference will cover the theory and practice of application-specific
systems, architectures and processors. The 2018 conference will build upon
traditional strengths in areas such as computer arithmetic, cryptography,
compression, signal and image processing, network processing,
reconfigurable computing, application-specific instruction-set processors,
and hardware accelerators.
We especially encourage submissions in the following areas:
. Machine and Deep Learning: architectures and applications that exploit
efficient machine learning algorithms (neural network, cooperative
learning, statistical learning, multi-agent learning, etc) and their
applications in fields like medicine and health, security, smart cities,
economics.
. Cloud Computing infrastructures and acceleration: design experiences and
real implementations of systems with high environmental impact, including
hardware and software architectures for energy-efficient computing;
virtualization; resource management techniques; innovative data-center
management strategies; SW/OS-level implementations in real systems and data
centers; energy-efficient big data management; data centers powered by
renewable energy sources and data centers in smart grids.
. Heterogeneous systems: applications and platforms that exploit
heterogeneous computing resources, including FPGAs, GPUs, or CGRAs.
. System security: cryptographic hardware architectures, security
processors, countermeasures against side-channel attacks, and secure cloud
computing.
. Big data analytics: extracting and correlating information from
large-scale semi-structured and unstructured data using
application-specific systems.
. Scientific computing: architectures and algorithms that address
scientific applications requiring significant computing power and design
customization (bioinformatics, climate modeling, astrophysics, seismology,
etc.).
. Industrial computing: systems and architectures for providing high-
throughput or low latency in various industrial computing applications.
. Design space exploration: methods for customizing and tuning application-
specific architectures to improve efficiency and productivity.
. Platform-specific architectures: novel architectures for exploiting
specific compute domains such as smartphones, tablets, and data centers,
particularly in the context of energy efficiency.
. Hardware and software architectures for cyber-physical systems: modeling
and simulation techniques for large cyber-physical sytems, node
architectures, cognitive control for CPS.
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SUBMISSION OF PAPERS
All manuscripts will be reviewed by at least three members of the program
committee. Submissions should be a complete manuscript or, in special
cases, may be a summary of relevant work. Manuscript for full paper should
be not exceeding 8 single-spaced, double-column pages using 10-point size
font on 8.5X11 inch pages (IEEE conference style) including references,
figures and tables. Manuscript for short papers should not exceed 4
single-space, double-column pages. Manuscripts for posters should not be
not exceeding 2 sing-spaced, double-column pages..
Papers are to be submitted through EasyChair. Submitted papers should not
have appeared in or be under consideration for a different workshop,
conference or journal. It is also expected that all accepted papers
(regular, short or poster) will be presented at ASAP by one of the authors.
Failure to present will result in the removal of the submission from the
proceedings before publication in IEEE Xplore.
All papers must be submitted electronically in PDF format.
Submissions can be made through:
. ASAP2018 web site: http://asapconference.org/
. EasyChair: https://easychair.org/conferences/?conf=asap2018
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IMPORTANT DATES:
Submission deadline: April 22, 2018 - Extended to May 7, 2018
Decision notification: May 22, 2018 - Extended to May 25, 2018
Camera Ready: May 31, 2018 - Extended to June 6, 2018
Conference: July 10-12, 2018
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TOPICS OF INTEREST (but not limited)
Big data analytics
Cloud Computing infrastructures and acceleration
Heterogeneous Computing in Data Centers
Accelerating Data Center Workloads
FPGA-based Deep Learning
Embedded systems and Domain-Specific solutions (Digital Media, Gaming,
Automotive applications)
Accelerating Genomic Computations
Acceleration of Data Analytics
Reconfigurable Computing in the IoT era
Applications in Finance
Application-aware controller synthesis
Emerging Technologies (optical models, 3D Interconnects, devices)
Reconfigurable Accelerators
Hardware and software architectures for cyber-physical systems
Distributed Systems & Networks
Wireless and Mobile Systems
Critical issues (Security, Energy efficiency, Fault-Tolerance)
Autonomous and semi-autonomous large-scale CPS
Autonomic computing systems
High-Level Design Methods (Hardware/Software co-design, Compilers)
Simulations and Prototyping (performance analysis, verification tools)
Socio-technical systems
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ORGANIZERS
General Chairs
Marco D. Santambrogio, Politecnico di Milano, Italy
Jose L. Ayala, Complutense University of Madrid, Spain
Program Chairs
Zhiru Zhang, Cornell University, New York, USA
Diana Goehringer, TU Dresden, Germany
Finance and Sponsorship Chair
Sara Notargiacomo, Politecnico di Milano, Italy
Local Chair
Marco Rabozzi, Politecnico di Milano, Italy
Publicity and Media Chairs
Jari Nurmi, Tampere University of Technology, Finland
Brian F. Veale, IBM, USA
Steering Committee
José A.B. Fortes, University of Florida, USA
Sun-Yuan, Kung Princeton University, USA
Wayne Luk, Imperial College London, UK
Michael J. Schulte, University of Wisconsin Madison, USA
Earl Swartzlander, The University of Texas at Austin, USA
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