[hpc-announce] Deadline approaching: CORRECTNESS workshop @ SC'18

Cindy Rubio Gonzalez crubio at ucdavis.edu
Wed Jul 18 11:42:10 CDT 2018


*========================================================================
                           CALL FOR PAPERS     Second International
Workshop on Software Correctness for HPC                  Applications
(Correctness 2018)    In conjunction with SC18: The International
Conference for High  Performance Computing, Networking, Storage and
Analysis, November 12,       2018, Dallas, Texas, USA. In cooperation with
IEEE TCHPC.               https://correctness-workshop.github.io/2018/
<https://correctness-workshop.github.io/2018/>========================================================================Dates=====Paper
submissions due: August 10, 2018Notification of acceptance: September 21,
2018Camera-ready papers due (firm): October 8, 2018Scope=====Ensuring
correctness in high-performance computing (HPC) applications is one of the
fundamental challenges that the HPC community faces today. While
significant advances in verification, testing, and debugging have been made
to isolate software errors (or defects) in the context of non-HPC software,
several factors make achieving correctness in HPC applications and systems
much more challenging than in general systems software: growing
heterogeneity (architectures with CPUs, GPUs, and special purpose
accelerators), massive scale computations (very high degree of
concurrency), use of combined parallel programing models (e.g., MPI+X), new
scalable numerical algorithms (e.g., to leverage reduced precision in
floating-point arithmetic), and aggressive compiler
optimizations/transformations are some of the challenges that make
correctness harder in HPC. The following DOE report lays out the key
challenges and research areas of HPC correctness:
https://science.energy.gov/~/media/ascr/pdf/programdocuments/docs/2017/HPC_Correctness_Report.pdf
<https://science.energy.gov/~/media/ascr/pdf/programdocuments/docs/2017/HPC_Correctness_Report.pdf>As
the complexity of future architectures, algorithms, and applications in HPC
increases, the ability to fully exploit exascale systems will be limited
without correctness. With the continuous use of HPC software to advance
scientific and technological capabilities, novel techniques and practical
tools for software correctness in HPC are invaluable.The goal of the
Correctness Workshop is to bring together researchers and developers to
present and discuss novel ideas to address the problem of correctness in
HPC. The workshop will feature contributed papers and invited talks in this
area.Topics======Topics of interest include, but are not limited to:*
Formal methods and rigorous mathematical techniques for correctness in HPC
applications* Frameworks to address the challenges of testing complex HPC
applications (e.g., multiphysics applications)* Approaches for the
specification of numerical algorithms with the goal of correctness
checking* Error identification in the design and implementation of
numerical algorithms using finite-precision floating point numbers* Tools
to control the effect of non-determinism when debugging and testing HPC
software* Scalable debugging solutions for large-scale HPC applications*
Scalable tools for model checking, verification, certification, or symbolic
execution* Static and dynamic analysis to test and check correctness in the
entire HPC software ecosystem* Predictive debugging and testing approaches
to forecast the occurrence of errors in specific conditions* Machine
learning and anomaly detection for bug detection and localization*
Correctness in emerging HPC programing models* Analysis of software error
propagation and error handling in HPC runtime systems and libraries*
Metrics to measure the degree of correctness of HPC software*
Specifications to check the correctness of runtime systems* Large databases
of bug reports and/or reproducible test cases of HPC software* Benchmarks
to test the effectiveness of HPC correctness toolsProceedings===========The
proceedings will be archived in IEEE Xplore via TCHPC.Submissions and
Format======================Authors are invited to submit manuscripts in
English structured as technical or experience papers not exceeding 8 pages
of content, including everything. Submissions must use the IEEE
format.Organizers==========Ignacio Laguna, LLNL Cindy Rubio-González, UC
DavisProgram Committee=================Eva Darulova, MPI-SWS, Germany
Ganesh Gopalakrishnan, University of Utah, USA Paul Hovland, Argonne
National Laboratory, USA Geoff Hulette, Sandia National Laboratories, USA
Costin Iancu, Lawrence Berkeley National Laboratory, USA Sriram
Krishnamoorthy, Pacific Northwest National Laboratory, USA Richard Lethin,
Reservoir Labs, Yale University, USA Francesco Logozzo, Facebook Research,
USA Jackson Mayo, Sandia National Laboratories, USA John Mellor-Crummey,
Rice University, USA Matthias Müller, RWTH Aachen University, Germany
Tristan Ravitch, Galois, Inc, USA Nathalie Revol, INRIA - ENS de Lyon,
France Markus Schordan, Lawrence Livermore National Laboratory, USA Koushik
Sen, UC Berkeley, USA Stephen Siegel, University of Delaware, USA
Contact=======Please address workshop questions to Ignacio Laguna
(ilaguna at llnl.gov <ilaguna at llnl.gov>) and/or Cindy Rubio-González
(crubio at ucdavis.edu <crubio at ucdavis.edu>).*


-- 
Cindy Rubio González
Assistant Professor
Department of Computer Science
University of California, Davis
http://web.cs.ucdavis.edu/~rubio/
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