[hpc-announce] 25th anniversary of RAW 2018: Call for paper and more [Deadline Approaching]
Brian Veale
veale at acm.org
Wed Feb 7 21:45:36 CST 2018
[Please accept our apologies if you receive multiple copies of this Call
for Papers (CFP)]
CALL FOR PAPERS
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25th Reconfigurable Architectures Workshop
RAW 2018
Vancouver, British Columbia, Canada, May 21 – 22, 2018
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QUICK LINK:
Web site: http://raw.necst.it/
Submissions: https://easychair.org/conferences/?conf=raw2018
IMPORTANT DATES:
Submission deadline February 9, 2018
Decision notification March 3, 2018
Conference: May 21-22, 2018
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HOW TO CELEBRATE THE 25th ANNIVERSARY OF RAW
6 INVITED SPEAKERS
We will host a series of invited talks describing the history of this
field and future directions for reconfigurable computing, in alphabetical
order:
. Kaveh Aasaraai, Hardware Engineer at Jump Trading LLC
. Juergen Becker, is professor at the Karlsruhe Institute of Technology and
head of the ITIV institute
. Derek Chiou, Principal Hardware Architect at Microsoft and associate
professor at the University of Texas at Austin
. Viktor K. Prasanna, Charles Lee Powell Chair in Engineering and Professor
at the University of Southern California
. Wayne Luk, Full Professor of Computer Engineering at Imperial College
London
. Markus Weimer, Leader of the lead ML algo development team at Microsoft
DESIGN CONTEST
We are also pleased to announce the first edition of the Floorplanning
Design Contest. The registration to the contest is free, teams willing to
participate can simply apply online at: http://raw-floorplanning-c
ontest.necst.it/.
The winning team will be invited to publish either a short or full paper at
RAW
about the proposed floorplanning algorithm. The design contest will open on
the
1st of February and will close on the 28th of February. At the end of the
contest,
the winning team will be announced.
FOLLOW US ON FACEBOOK
https://www.facebook.com/groups/ReconfigurableArchitecturesWorkshop/
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RAW 2018
The 25th Reconfigurable Architectures Workshop (RAW 2018) will be held in
Vancouver,
British Columbia CANADA in May 2018. RAW 2018 is associated with the 32nd
Annual
IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS
2018) and
is sponsored by the IEEE Computer Society and the Technical Committee on
Parallel
Processing. The workshop is one of the major meetings for researchers to
present
ideas, results, and on-going research on both theoretical and practical
advances in
Reconfigurable Computing.
A reconfigurable computing environment is characterized by the ability of
underlying
hardware architectures or devices to rapidly alter (often on the fly) the
functionalities of their components and the interconnection between them to
suit the
problem at hand. The area has a rich theoretical tradition and wide
practical
applicability. There are several commercially available reconfigurable
platforms
(FPGAs and coarse-grained devices) and many modern applications (including
embedded
systems and HPC) use reconfigurable subsystems. An appropriate mix of
theoretical
foundations and practical considerations, including algorithms
architectures,
applications, technologies and tools, is essential to fully exploit the
possibilities
offered by reconfigurable computing. The Reconfigurable Architectures
Workshop aims
to provide a forum for creative and productive interaction for researchers
and
practitioners in the area.
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SUBMISSION OF PAPERS
All manuscripts will be reviewed by at least three members of the
program committee. Submissions should be a complete manuscript or,
in special cases, may be a summary of relevant work. Manuscript for
full paper should be not exceed 8 single-spaced, double-column pages
using 10-point size font on 8.5X11 inch pages (IEEE conference style)
including references, figures and tables. Manuscript for short papers
should be not exceed 4 single-space, double-column pages.
Papers are to be submitted through EasyChair. Submitted papers should
not have appeared in or be under consideration for a different workshop,
conference or journal. It is also expected that all accepted papers
(regular or short) will be presented at the workshop by one of the
authors.
All papers must be submitted electronically in PDF format.Submissions can
be made through:
. the RAW2018 web site: http://raw.necst.it/
. EasyChair: https://easychair.org/conferences/?conf=raw2018
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IMPORTANT DATES
Submission deadline February 9, 2018
Decision notification March 3, 2018
Conference: May 21-22, 2018
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INVITED SPEAKERS
Kaveh Aasaraai, Hardware Engineer at Jump Trading LLC
Juergen Becker, is professor at the Karlsruhe Institute of
Technology and head of the ITIV institute
Derek Chiou, Principal Hardware Architect at Microsoft and
associate professor at the University of Texas at Austin
Viktor K. Prasanna, Charles Lee Powell Chair in Engineering and
Professor at the University of Southern California
Wayne Luk, Full Professor of Computer Engineering at Imperial
College London
Markus Weimer, Leader of the lead ML algo development team at
Microsoft
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TOPICS OF INTEREST
Hot Topics in Reconfigurable Computing
Configurable Cloud
Heterogeneous Computing in Data Centers
Accelerating Data Center Workloads
FPGA-based Deep Learning
Accelerating Genomic Computations
Acceleration of Data Analytics
Reconfigurable Computing in the IoT era
Organic Computing, Biology-Inspired Solutions
Applications in Finance
Architectures & CAD
Algorithmic Techniques and Mapping
Emerging Technologies (optical models, 3D Interconnects, devices)
Reconfigurable Accelerators
Embedded systems and Domain-Specific solutions (Digital Media,
Gaming, Automotive applications)
FPGA-based MPSoC and Multicore
Distributed Systems & Networks
Wireless and Mobile Systems
Critical issues (Security, Energy efficiency, Fault-Tolerance)
Runtime & System Management
Run-Time Reconfiguration Models and Architectures
Autonomic computing systems
Operating Systems and High-Level Synthesis
High-Level Design Methods (Hardware/Software co-design, Compilers)
System Support (Soft processor programming)
Runtime Support
Reconfiguration Techniques
Simulations and Prototyping (performance analysis, verification
tools)
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ORGANIZERS
Workshop Chairs
Marco D. Santambrogio, Politecnico di Milano, Italy
Diana Goehringer, Ruhr-University Bochum, Germany
Program Chairs
Dirk Stroobandt, Ghent University, Belgium
Steering Committee
Juergen Becker, Karlsruhe Insttute of Technology, Germany
Viktor K. Prasanna, University of Southern California, USA
Ramachandran Vaidyanathan, Louisiana State University, USA
Publicity
Brian Veale, IBM, USA
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