[hpc-announce] CFP: 2nd Workshop on Hardware/Software Techniques for Minimizing Data Movement (Min-Move 2018), to be held in conjunction with ASPLOS 2018

[Adwait Jog]

CALL FOR WORKSHOP PAPERS

2nd Workshop on Hardware/Software Techniques for Minimizing Data
Movement (Min-Move 2018), to be held in conjunction with ASPLOS 2018

For more details and the latest information regarding this workshop,
visit: http://insight-archlab.github.io/minmove.html

Overview
The goal of achieving exascale performance under stringent power
budget is important, exciting, and challenging. One of the biggest
impediments to achieving this goal is the excessive data movement
across different levels of the memory hierarchy. In this workshop, we
intend to discuss innovative ways to reduce this data movement in a
variety of architectures (including CPUs, GPUs, handhelds, data
centers, IoT, accelerators etc.). We welcome all novel submissions
that describe hardware, software, or hardware-software codesign
techniques to reduce the data movement.

Scope
Any idea/technique that can help in reducing the data movement is
appropriate for this workshop. Some topics (but not limited to) are:

Near-Data Processing (e.g., near caches or memory or storage devices)
In-Memory Computing (e.g., in caches or memory or storage devices)
Approximate Computing (e.g., load value approximations)
Cache/DRAM Locality Optimizations
Data Compression Techniques
Emerging Memory Technologies (e.g., STT-RAM, Memristor)
Non-Von-Neumann Architectures (e.g., Quantum Architectures, Automata
Processor)
Interconnection Architectures (e.g., on-chip, off-chip, Ethernet,
interposer system, flexible interconnects for FPGA)
Programming and Language Support for Minimizing Data Movement

Submission
Please use the standard LaTeX or Word ACM templates. The length
(including references and other material) of the paper should not
exceed 6 pages, with a minimum length of 2 pages. Email your paper to
all the organizers by the deadline (see Important Dates below).

Proceedings
An online version of all the papers will be available on the workshop
website. This choice allows authors to use feedback from the workshop
to extend their work for future publication at a more formal venue.

Important Dates
Final Deadline: Feb 12th, 2018
Workshop Date: March 24th, 2018

Organizing Committee
Adwait Jog, College of William and Mary (Email: adwait at cs.wm.edu)
Eun Jung (EJ) Kim, Texas A&M University (Email: ejkim at cs.tamu.edu)

Program Committee
Niladrish Chatterjee (Nvidia)
Reetuparna Das (UMich)
Myoungsoo Jung (Yonsei)
David Kaeli (Northeastern)
Onur Kayiran (AMD Research)
Aasheesh Kolli (VMWare and Penn State)
Asit Mishra (Intel)
Yoonho Park (IBM)
Gennady Pekhimenko (U
​ ​
Toronto)
Lawrence Rauchwerger (Texas A&M)

Questions
Please contact the organizers if you have any questions. Please email
us with the subject prefixed by the tag “Min-Move:”. For example,
“Min-Move:<your-subject-here>”
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