[hpc-announce] REMINDER: call for submissions | PMES 2018: 3rd International Workshop on Post Moore's Era Supercomputing

[Vetter, Jeffrey S.]

-- Call for Submissions -- Call for Submissions -- Call for Submissions -- 

PMES 2018: 3rd International Workshop on Post Moore's Era Supercomputing
PMES 2018: 3rd International Workshop on Post Moore's Era Supercomputing	
PMES 2018: 3rd International Workshop on Post Moore's Era Supercomputing
 
    Held in conjunction with SC18: The International Conference for
      High Performance Computing, Networking, Storage and Analysis
    Sunday, 11 November 2018
    Dallas Convention Center

Important Links
	  
  * Workshop URL: http://j.mp/pmes18 
  * SC18 Workshop URL: https://sc18.supercomputing.org/presentation/?id=wksp121&sess=sess156 
  * Call for Submissions: http://j.mp/pmes18cfp

Important Dates

  * Submission site opens: July 2018
  * Submission deadline: 31 Aug 2018 AoE
  * Notification: 24 Sep 2017
  * Workshop:  Sunday, 11 Nov 2017

Workshop Overview

The 3rd International Workshop on Post Moore's Era Supercomputing
(PMES) follows the very successful PMES workshops at PMES16
<http://j.mp/pmes2016> and PMES17 <http://j.mp/pmes2017>.

These interdisciplinary workshops are organized to explore the
scientific issues, challenges, and opportunities for supercomputing
beyond the scaling limits of Moore's Law, with the ultimate goal of
keeping supercomputing at the forefront of computing technologies
beyond the physical and conceptual limits of current
systems. Continuing progress of supercomputing beyond the scaling
limits of Moore's Law is likely to require a comprehensive re-thinking
of technologies, ranging from innovative materials and devices,
circuits, system architectures, programming systems, system software,
and applications.

The workshop is designed to foster interdisciplinary dialog across the
necessary spectrum of stakeholders: applications, algorithms,
software, and hardware. Motivating workshop questions will include the
following. "What technologies might prevail in the Post Moore's Era?"
"How can applications effectively prepare for these changes through
co-design?" "What architectural abstractions should be in place to
represent the traditional concepts like hierarchical parallelism,
multi-tier data locality, and new concepts like variable precision,
approximate solutions, and resource tradeoff directives?" "What
programming models might insulate applications from these changes?"

Experts from academia, government, and industry in the fields of
computational science, mathematics, engineering, and computer science
will have the opportunity to participate in the workshop as a
presenter, panelist, or audience member. Invited speakers will provide
insights and challenges from their disciplinary perspectives, while
peer-reviewed position papers on promising ideas will be presented to
facilitate community interaction and diversity. Panel sessions will
provide opportunities for interactions across disciplines and
provocative questions from the audience.

Workshop Topics

  * Technology trends and predictions
  * Quantum computing
  * Domain specific or specialized architectures
  * Neuromorphic and brain-inspired computing
  * Probabilistic and stochastic computing
  * Superconducting and cryogenic computing
  * Interconnection technologies like silicon photonics and optics 
  * Alternative device technologies like CNT transistors
  * Approximate computing
  * Biological computing
  * Alternative memory systems including non-volatile memory
  * Beyond Von-Neumann computer architectures, including in-memory
    processing and memory-based computing
  * Exploiting nonlinear dynamics and chaos in device behavior
  * Reversible, adiabatic, and ballistic computing
  * Integration of device technologies including approaches in stacking,
    interposers, etc.
  * PMES application drivers from computational science, data intensive,
    deep learning 
  * Programming paradigms for PMES systems
  * Cross-cutting topics like methodologies and tools for codesign,
    design automation, modeling, simulation, emulation, or benchmarking
    of PMES systems 

Proceedings

  * Extended abstracts selected for the workshop will be compiled and
    published as a technical report on arXiv.org. Authors will retain
    the copyright to their material.

Workshop Co-Chairs

  * Satoshi Matsuoka (Tokyo Institute of Technology) 
  * Jeffrey S. Vetter (Oak Ridge National Laboratory)

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--
Jeffrey Vetter | +1-865-356-1649 | http://ft.ornl.gov/~vetter