[hpc-announce] Late Breaking and Short Papers CFP: PMBS'17 @ SC'17 - 8th IEEE International Workshop on Performance Modeling, Benchmarking and Simulation of HPC Systems

[Steven Wright]

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   8th IEEE International Workshop on Performance Modeling,
               Benchmarking and Simulation of
              High Performance Computer Systems
                         (PMBS17)

  held as part of SC17, Denver, CO, November 2017

               http://www.pmbsworkshop.org
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The PMBS17 workshop is concerned with the comparison of
high-performance computing systems through performance modeling,
benchmarking or through the use of tools such as simulators.

We are particularly interested in research which reports the
ability to measure and make tradeoffs in software/hardware
co-design to improve sustained application performance. We are
also keen to capture the assessment of future systems, for
example through work that ensures continued application
scalability through peta- and exa-scale systems.

The aim of this workshop is to bring together researchers, from
industry and academia, concerned with the qualitative and
quantitative evaluation and modeling of high-performance
computing systems. Authors are invited to submit novel research
in all areas of performance modeling, benchmarking and
simulation, and we welcome research that brings together current
theory and practice. We recognize that the coverage of the term
'performance' has broadened to include power consumption and
reliability, and that performance modeling is practiced through
analytical methods and approaches based on software tools and
simulators.

=== Topics of Interest ===

We encourage submissions in the following areas:

- Performance modeling, analysis, and prediction of applications
   and high-performance computing systems
- Novel techniques and tools for performance evaluation and
   prediction
- Advanced simulation techniques and tools
- Micro-benchmarking, application benchmarking and tracing
- Performance-driven code optimization and scalability analysis
- Verification and validation of performance models
- Benchmarking and performance analysis of novel hardware
- Performance concerns in software/hardware co-design
- Tuning and auto-tuning of HPC applications and algorithms
- Benchmark suites
- Performance visualisation
- Real-world case studies
- Studies of novel hardware such as Intel Xeon Phi co-processor
   technology, NVIDIA Kepler GPUs and AMD Fusion APU

Work which examines similar topics will also be considered.

=== Submission Guidelines ===

Authors are invited to submit short papers with unpublished,
original work of not more than 10 pages of single column text
describing initial research or early first-of-a-kind results
using single spaced fonts on pages of 8.5 x 11 inches (this
limit includes all figures, content etc but does not include
references). All papers should be formatted to use the LNCS
manuscript and workshop/conference guidelines available at:
http://www.springer.com/gb/computer-science/lncs/conference-proceedings-guidelines

These papers will be presented in a dedicated, interactive
session at PMBS 17 enabling open discussion with industry
and domain experts.

All accepted papers (subject to post-review revisions) will be
published in a post-proceedings issue of Springer’s Lecture Notes
in Computer Science.

Authors of selected papers will also be invited to submit revised
manuscripts for inclusion in a special issue journal publication
(pending)

Papers should be submitted using EasyChair at:
https://www.easychair.org/conferences/?conf=pmbs17

=== Important Dates ===

Late Breaking/Short Paper Submissions - October 2nd 2017 (23:59 AoE)
Late Breaking/Short Paper Notifications - October 16th 2017
PMBS17 Workshop - November 13th 2017

=== More Information ===

For more information consult the PMBS Workshop homepage at:
http://www.pmbsworkshop.org.