[hpc-announce] CFP: WPMVP 2018

Eitzinger, Jan jan.eitzinger at fau.de
Wed Oct 4 08:36:03 CDT 2017

WPMVP 2018:  4th Workshop on Programming Models for SIMD/Vector Processing
In conjunction with the 23st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2018)
Vienna, Austria, Feb 24 – 28, 2018



Fri 24 Nov 2017: Paper submission deadline
Mon 18 Dec 2017: Notification of acceptance


SIMD processing is still a main driver of performance in general purpose processor architectures besides multi-core technology. Both technologies increase the potential performance by factors, but have to be be explicitly utilized by the software. To expose those different levels of parallelism in a productive and manageable way is still an active area of research. NVIDIA stirred the programming interface scene with the development of a simple yet efficient performance-oriented application programmer interface. OpenACC, OpenMP 4.0, OpenCL, Cilk+ and icpc are just examples for many choices available. Additionally, established optimizing compilers still improve significantly in unleashing the SIMD potential. Notable developments on the hardware side include relaxation of alignment requirements and more powerful scatter/gather and shuffle instructions. Recent developments include the introduction of 512bit SIMD units in general purpose processors (AVX512) and new innovations as the Scalable Vector Extension for the ARMv8-A architecture.


The purpose of this workshop is to bring together practitioners and researchers from academia and industry to discuss issues, solutions, and opportunities in enabling application developers to effectively exploit SIMD/vector processing in modern processors. We seek submissions that cover all aspects of SIMD/vector processing. Topics of interests include, but are not restricted to:

	• Programming models for SIMD/vector processing
	• C/C++/Fortran extensions for SIMD (e.g., OpenMP, OpenACC, OpenCL, SIMD intrinsics)
	• New data parallel or streaming programming models for SIMD
	• Exploitation of SIMD/vector in Java, scripting languages, and domain-specific languages
	• Compilers & tools to discover and optimise SIMD parallelism
	• Case study, experience report, and performance analysis of SIMD/vector applications


Program Chair:
- Jan Eitzinger (RRZE, University Erlangen-Nuremberg, Germany)
- James Brodman (Intel US)

Program Committee:
- Jan Eitzinger (RRZE, University Erlangen-Nuremberg, Germany)
- Gabriel Tanase (IBM Research, Austin, TX, USA)
- James Brodman (Intel, USA)
- Sebastian Hack (University Saarland, Germany)
- Paul Kelly (Imperial College London, UK)
- Franz Franchetti ( CMU, USA )
- Lionel Lacassagne (University Paris 6, France)
- Daniel Etiemble (University Paris 11, France)
- Michael Klemm (Intel, Germany)
- Jose Moreira ( IBM Research, TJ Watson, NY, USA )
- Marat Dukhan (Georgia Tech, USA now Facebook)
- Etienne Walter (Atos, France)
- Pablo de Oliveira Castro (UVSQ, Versailles, France)
- Peng Wu (Huawei Research Labs, USA)
- Gabriele Keller (University of New South Wales, Australia)
- Fernanda Foertter (Oak Ridge National Lab, US)
- Sandra Wienke (RWTH Aachen, Germany)


Submitted papers must be no more than 8 pages in length. Authors are encouraged to use the ACM two-column format (http://www.sigplan.org/authorInformation.htm).  Papers should be submitted in PDF format and should be legible when printed on a black-and-white printer. Each submission will receive at least three reviews from the technical program committee. Selected submissions will be invited to present at the workshop and published in the workshop proceedings. Accepted papers will be published in the ACM digital library after the workshop.

Authors must register and submit the paper through the online submission system  at https://easychair.org/conferences/?conf=wpmvp18.  If you have problems accessing the system, e-mail your submission to jan.eitzinger at fau.de .

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