[hpc-announce] 23rd Reconfigurable Architectures Workshop - Call for Participation

[Brian Veale]

[Please accept our apologies if you receive multiple copies of this Call
for Participation]


RAW 2016 - Call for Participation

=========================


23rd Reconfigurable Architectures Workshop

May 23-24, 2016

Chicago, Illinois USA



Website: http://raw.necst.it/


Advance Program:

May 23, 2016:

- Keynote speech: Reconfigurable Accelerators for Big Data and Cloud

  Speaker: Peter Hofstee - IBM, Austin, TX, USA

- Social Event Sponsor: TOPIC Embedded Products


May 24, 2016:

- Keynote speech

  Speaker: Patrick Lysaght - Xilinx, San Jose, CA, USA

- Keynote speech: Why the application development on Systems-on-Chip
demands a next level programming model

  Speaker: Dirk van den Heuvel - TOPIC Embedded Products, Eindhoven, the
Netherlands


Overview:

The 23rd Reconfigurable Architectures Workshop (RAW 2016) will be held in
Chicago, Illinois USA in May 2016. RAW 2016 is associated with the 30th
IEEE International Parallel & Distributed Processing Symposium (IPDPS 2016)
and is sponsored by the IEEE Computer Society Technical Committee on
Parallel Processing. The workshop is one of the major meetings for
researchers to present ideas, results, and on-going research on both
theoretical and practical advances in Reconfigurable Computing.


A reconfigurable computing environment is characterized by the ability of
underlying hardware architectures or devices to rapidly alter (often on the
fly) the functionalities of their components and the interconnection
between them to suit the problem at hand. The area has a rich theoretical
tradition and wide practical applicability. There are several commercially
available reconfigurable platforms (FPGAs and coarse-grained devices) and
many modern applications (including embedded systems and HPC) use
reconfigurable subsystems. An appropriate mix of theoretical foundations
and practical considerations, including algorithms architectures,
applications, technologies and tools, is essential to fully exploit the
possibilities offered by reconfigurable computing. The Reconfigurable
Architectures Workshop aims to provide a forum for creative and productive
interaction for researchers and practitioners in the area.



Topics of interest include, but are not limited to:

Architectures & Algorithms

· Theoretical Interconnect and Computation Models

· Algorithmic Techniques and Mapping

· Run-Time Reconfiguration Models and Architectures

· Emerging Technologies (optical models, 3D Interconnects, devices)

· Bounds and Complexity Issues

· Analog Arrays



Reconfigurable Systems & Applications

· Reconfigurable Accelerators (HPC, Bioinformatics, Acceleration
Applications in Finance, Data Mining, Big Data, and Analytics)

· Embedded systems and Domain-Specific solutions (Digital Media, Gaming,
Automotive applications)

· FPGA-based MPSoC and Multicore

· Distributed Systems and Networks

· Wireless and Mobile Systems

· Emerging applications (Organic Computing, Biology-Inspired Solutions)

· Critical issues (Security, Energy efficiency, Fault-Tolerance)



Software & Tools

· Operating Systems and High Level Synthesis

· High-Level Design Methods (Hardware/Software Co-design, Compilers)

· System Support (Soft Processor Programming)

· Runtime Support

· Reconfiguration Techniques (Reusable Artifacts)

· Simulations and Prototyping (Performance Analysis, Verification Tools)
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