[hpc-announce] Extended Deadline: Workshop on Multi-Objective Many-Core Design (MOMAC)

Stefan Wildermann stefan.wildermann at fau.de
Mon Jan 18 06:06:49 CST 2016

*** Extended Submission Deadline: January 24, 2016 ***


                  Call for Papers
          Third International Workshop on
      Multi-Objective Many-Core Design (MOMAC)
         Nuremberg, Germany, April 4-5, 2016

in conjunction with International Conference on
Architecture of Computing Systems (ARCS 2016)



Paper submission deadline: January 24, 2016 (extended!)
Notification of acceptance: February 15, 2016
Final version: February 26, 2016


All accepted papers will be published in the ARCS Workshop Proceedings
and by the IEEE Computer Society, through the IEEE Xplore Digital Library.

Dear colleagues,

please consider the opportunity to contribute to the Third Workshop
on Multi-Objective Many-Core Design (MOMAC) to be held in Nuremberg,
Germany in conjunction with ARCS 2016.


Semiconductor industry is hitting the utilization wall, resulting in
parallel and heterogeneous many-core architectures. Applications have
to exploit the available parallelism and heterogeneity to meet their
functional and non-functional requirements and to gain performance
improvements. A main challenge originates from many-cores promoting
highly dynamic usage scenarios as already observable in today’s “smart
devices”, where multiple and varying numbers of applications are
running at different points in time. As a consequence, providing
mapping of applications to processor cores which is optimal and
predictable with respect to performance, timing, energy consumption,
safety, security, etc. may not be guaranteed by static design-time
optimization alone. At the same time, pure run-time optimization may
result in unpredictable and non-optimal system states. This workshop
investigates this field of tension of run-time, design-time, and
hybrid design methodologies for the mapping of applications on
many-core systems, particularly addressing the aspect of multiple
conflicting objectives that drive the design.

This field of research includes numerous intermeshed aspects:
- Languages, Models, and Compilers: How to specify, analyze,
parallelize, and compile programs which support dynamic usage
scenarios in many-cores?
- Formal methods, Test, and Verification: How to analyze and verify
predictable execution of applications despite unforeseeable
run-time events?
- Optimization Techniques: Which design-time and run-time techniques
as well as combinations of them provide optimized and predictable
application mapping for many-cores?
- Architecture: Which architectural concepts are required to support
predictability, run-time management and (self-)optimization?


Topics of interest include, but are not limited to:

Multiple Objectives & Predictability
* Performance
* Hard & Soft Real-time
* Energy Efficiency
* Fault Tolerance & Reliability
* Safety
* Security
* Scalability
* Flexibility

* Programming
* Modelling
* Parallelization
* Resource awareness

Design-time Optimization
* Multi-Objective Optimization
* Design Space Exploration
* Verification
* Profiling
* Performance Analysis

Run-time Optimization
* Resource Management
* Temperature and Power Management
* Decentralized vs Centralized Management
* Reconfigurable Computing
* Operating System
* Online Verification
* Auto-tuning
* Machine Learning

* Architectural Predictability
* Reconfiguration
* Power Management
* Benchmarking
* Monitoring


Paper can be submitted as regular papers or as position papers.
Formats requirements:

- up to 8 pages (regular paper) IEEE style

- up to 4 pages (position paper) IEEE style: Preliminary and exploratory
work are welcome in this category, including wild & crazy ideas.
Authors submitting papers in this category must prepend
"Position Paper:" to the title of the submitted paper.

- Special call for Tutorials, introducing tools and techniques for
modeling, programming, analysis, and optimization of many-core systems.
Each tutorial should be accompanied by a 4-page tutorial paper in IEEE
conference style. The title of a tutorial paper should be prepended with

The proceedings will be published through VDE Verlag on CD and online
by the IEEE Computer Society through the IEEE Xplore Digital Library.
Papers should not exceed 8 pages (regular papers) or 4 pages (position
papers) in IEEE format A4, templates can be found at

PDF submission via EasyChair:

Paper submission deadline: January 24, 2016 (exended)
All papers undergo a blind review process. Authors will be notified
until February 15, 2016. Final version is due to February 26, 2016.
All accepted papers will be published in the ARCS Workshop Proceedings
and by the IEEE Computer Society, through the IEEE Xplore Digital Library.

*** LOCATION ***

MOMAC will be held conjunction with the 29th International Conference
on Architecture of Computing Systems (ARCS 2016), April 4-7,
2016 in Nuremberg, Germany.


Stefan Wildermann (FAU, Germany, stefan.wildermann at fau.de)
Michael Glaß (FAU, Germany, michael.glass at fau.de)


Lars Bauer (Karlsruhe Institute of Technology (KIT), Germany)
Deepak Gangadharan (University of Pennsylvania, U.S.A.)
Markus Happe (ETH Zurich, Switzerland)
Christian Haubelt (University of Rostock, Germany)
Martin Lukasiewycz (Robert Bosch GmbH, Germany)
Akash Kumar (Technische Universität Dresden, Germany)
Sanaz Mostaghim (Otto von Guericke University of Magdeburg, Germany)
Mathias Pacher (University of Hannover, Germany)
Gianluca Palermo (Politecnico Di Milano, Italy)
Felix Reimann (Audi Electronics Venture GmbH, Germany)
Muhammad Shafique (Karlsruhe Institute of Technology (KIT), Germany)
Lucian Vintan (Lucian Blaga University of Sibiu, Romania)
Sebastian Voss (fortiss GmbH, Germany)

Best regards,
Michael Glass and Stefan Wildermann

Dr.-Ing. Stefan Wildermann

Lehrstuhl für Informatik 12 (Hardware-Software-Co-Design)
Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU)
Cauerstr. 11, 91058 Erlangen
+49 9131 85 25161 (Telefon)
+49 9131 85 25149 (Fax)

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