[hpc-announce] CFP : 1st International Workshop on Dynamic Compilation for Architectural Heterogeneity and Program Optimization : DCAHPO 2017

Henri-Pierre Charles Henri-Pierre.Charles at cea.fr
Tue Dec 6 03:31:32 CST 2016

Call for Papers ===================================

1st International Workshop on Dynamic Compilation for Architectural
Heterogeneity and Program Optimization : DCAHPO 2017

Held in conjunction with the International Symposium on Code Generation
and Optimization (CGO) 2017

Web site : https://dcahpo.wordpress.com/

SCOPE =============================================

General purpose as well as integrated processors nowadays have to run
programs written in a wide variety of languages with isolation concerns.
Dynamic compilation, i.e. generate binary code at run- time, is becoming
a viable solution for many usage scenarios, and one of the goals of this
combined workshop is to present current research and look forward to
what is going to happen in this field of growing interest for the coming
years. Scientific challenges are multiple with
many inter-relations: program representation (source code, intermediate
representation, data sets), fast binary code generation, patches,
hardware abstraction, garbage collection, performance observation,
performance trade-offs, polymorphism, operating systems.
Furthermore, large-scale use of binary translation and on-the-fly code
generation and optimization is becoming pervasive both as an enabler for
virtualization, processor migration and also as processor implementation

The emergence and expected growth of just-in-time compilation,
virtualization and Web 2.0 scripting languages brings to the forefront a
need for efficient execution of this class of applications. The
availability of multiple execution threads brings new challenges and
opportunities, as existing binaries need to be transformed to benefit
from multiple processors, and extra processing resources enable
continuous optimizations and translation. The workshop scope
includes support for decoding/translation, support for execution
optimization and runtime support. It will set a high
scientific standard for such experiments, and requires insightful
analysis to justify all conclusions. The workshop will
favor submissions that provide meaningful insights, and identify
underlying root causes for the failure or success of the
investigated technique. Acceptable work must thoroughly investigate and
communicate why the proposed technique
performs as the results indicate.

The main goal of this full-day workshop is to bring together researchers
and practitioners with the aim of stimulating
the exchange of ideas and experiences on the potential and limits of the
underlying technology. The key focus is on the
challenges and opportunities for such assistance and opening new avenues
of research. A secondary goal is to enable
dissemination of hitherto unpublished techniques from commercial projects.

TOPICS OF INTERESTS ===============================

Dynamic compilation
Hardware support for dynamic compilation
Binary translation
On-the-fly code generation
On the fly optimization
Run-time support, hardware support
Support for architectural heterogeneity

Format: Full paper that consist of up to 6 pages, double column

Submission: https://easychair.org/conferences/?conf=dcahpo2017

Publication: ACM Digital Library within its International
Conference Proceedings Series (ICPS) with DOI publication number (ISBN
number assigned to DCAHPO '17 is 978-1-4503-4878-2)

Format ============================================

IMPORTANT DATES ===================================
- Paper : submission December 9,
- Author notification December 16
- Final manuscript January 15
- Workshop: February 4, 2017

ORGANIZATION ======================================

- Henri-Pierre CHARLES, CEA, France
- Robert COHN, Intel, USA
- Bjoern FRANKE, Edinburgh Univ., UK
- Andreas KRALL, Wien TU, AT
- Vijay Janapa REDDI, Univ. of Texas at Austin, USA
- Youfeng WU, Intel, USA

CONTACT ===========================================

- Henri-Pierre.Charles at cea.fr

Mél : Henri-Pierre.Charles at cea.fr Tél : +33 438 789 699
MINATEC Campus | 17 rue des Martyrs | 38054 Grenoble Cedex 9

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