[hpc-announce] ABSTRACT DEADLINE NEARING APRIL 20, 2016 - First Workshop on Performance Portable Programming Models for Accelerators (P^3MA) @ ISC 2016

Sunita Chandrasekaran sunisg123 at gmail.com
Sat Apr 9 14:49:08 CDT 2016


Title: First International Workshop on Performance Portable Programming
Models for Accelerators (P^3MA)


*June 23, 2016 *

co-located with ISC 2016 <http://www.isc-hpc.com/home.html>  June 19 - 23,
Frankfurt, Germany


High-Level programming models offer scientific applications a path onto HPC
platforms without an undue loss of portability or programmer productivity.
For example, using directives, application developers can port their codes
to accelerators incrementally while minimizing code changes. Other
approaches include Domain Specific Languages, C++ metaprogramming, and
runtimes APIs being developed for Exascale which are starting to emerge.
Although these approaches aim to introduce abstraction without performance
penalty, programming challenges are still manyfold especially with their
designs, implementations and application porting experiences on rapidly
evolving hardware, some with diverse memory subsystems.

The programming approaches will need to adapt to such developments and make
improvements to raise their performance portability that will increase the
productivity of accelerators as HPC components. Such improvements are
continuously being discussed with standards committees for C++, OpenCL,
OpenMP, OpenACC, and Exascale co- design centers for DSLs. This workshop is
designed to assess the improved features of programming models (including
but not limited to directives-based programming models), their
implementations, and experiences with their deployment in HPC applications
on multiple architectures.

The workshop will provide a forum for bringing together researchers,
vendors, users and developers to brainstorm aspects of heterogeneous
computing and its various tools and techniques.

*Topics of interest  (but are not limited to):*

   - Experience porting applications using high-level models
   - Hybrid heterogeneous or many-core programming with other models such
   as threading, message passing, and PGAS
   - Performance-portable scientific libraries for heterogeneous systems
   - Experiences in implementing compilers for programming directives on
   current and emerging architectures
   - Low level communications APIs or runtimes that support accelerator
   - Asynchronous task and event driven execution/scheduling
   - Extensions to programming models needed to support multiple memory
   hierarchies and accelerators
   - Performance modeling and evaluation tools
   - Power/energy studies
   - Auto-tuning or optimization strategies
   - Benchmarks and validation suites

 *Important Deadlines:*

*Abstract Submission: April. 20, 2016 AoE*

*Full Paper Submission: April 29th, 2016 AoE*

Paper Notification: May. 27, 2016

Camera Ready Paper: June 03, 2016

*Program Agenda *

1 of the 2 keynote speakers:

Dr. Si Hammond (Sandia National Lab, USA)


*Review process*

Abstracts and papers need to be submitted via Easy Chair:
We only accept paper submissions which are formatted correctly in LNCS style
<http://www.springer.com/computer/lncs?SGWID=0-164-6-793341-0> (single
column format) using either the LaTeX document class or Word template.
Incorrectly formatted papers will be excluded from the reviewing process.

Papers submissions are required to be within 18 pages in the above
mentioned LNCS style. This includes all figures and references.
The submissions are "single-blind", i.e. submissions are allowed to include
the author names.

All submitted manuscripts will be reviewed. The review process is not
double blind, i.e., authors will be known to reviewers. Submissions will be
judged on correctness, originality, technical strength, significance,
quality of presentation, and interest and relevance to the conference
scope. Submitted papers may NOT have appeared in or be under consideration
for another conference, workshop or journal.


*Steering Committee*

Matthias Muller, RWTH Aachen University, Germany

Barbara Chapman, StonyBrook University, USA

Oscar Hernandez, ORNL, USA

Duncan Poole, OpenACC, USA

Torsten Hoefler, ETH, Zurich

Michael Wong, OpenMP, Canada

Mitsuhisa Sato, University of Tsukuba, Japan

*Program Chair(s)*

Sunita Chandrasekaran, University of Delaware, USA <schandra at udel.edu>

Graham Lopez, ORNL, USA <lopezmg at ornl.gov>

*Program Committee *

Samuel Thibault, INRIA, University of Bordeaux, France
James Beyer, NVIDIA, USA
Wei Ding, AMD, USA
Saber Feki, King Abdullah University, Saudi Arabia
Robert Henschel, Indiana University, USA
Michael Klemm, Intel, USA
Eric Stotzer, Texas Instruments, USA
Amit Amritkar, University of Houston, USA
Guido Juckeland, HZDR, Germany
Will Sawyer, ETH, Zurich
Sameer Shende, University of Oregon, USA
Costas Bekas, IBM, Zurich
Toni Collis, University of Edinburgh, Scotland
Adrian Jackson, University of Edinburgh, Scotland
Henri Jin, NASA, USA
Andreas Knuepfer, TU Dresden, Germany
Steven Olivier, Sandia National Laboratory, USA
Suraj Prabhakaran, TU Darmstadt, Germany
Bora Ucar, ENS De Lyon, France
Sandra Wienke, Aachen University, Germany

*Questions?  Please contact one of the program chairs.*
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