[hpc-announce] CFP: The Twelfth IEEE Workshop on High-Performance Power-Aware Computing (HPPAC'16)

Song, Shuaiwen Shuaiwen.Song at pnnl.gov
Tue Oct 20 17:31:12 CDT 2015

                                                        CALL FOR PAPERS:
The Twelfth IEEE Workshop on High-Performance Power-Aware Computing (HPPAC)
                                                   May 27th, 2016, Chicago
Held in conjunction with  IEEE International Parallel & Distributed Processing Symposium (IPDPS)

Power and energy are now recognized as first-order constraints
in high-performance computing.  Optimizing performance under power
and energy bounds requires coordination across not only the software
stack (compilers, operating and runtime systems, job schedulers) but
also coordination with cooling systems and outwards to electrical
suppliers.  As we continue to move towards exascale and extreme scale
computing, understanding how power translates to performance
becomes an increasingly critical problem.

The purpose of this workshop is to provide a forum where cutting-edge
research in the above topic can be shared with others in the community.
As such, while we welcome full (10 page) papers as in previous years,
we are now also soliciting short papers (4 pages max).  While both should
conform to the list of topics below, short papers will be judged primarily
on their interest to the community.  As such, these may be position papers,
initial results, open problems, software announcements, or interesting
work that does not reach the level of a full-paper treatment.
All papers will be subject to single-blind peer review, and the quality of
both the short and standard papers is expected to be high.

Topics of particular interest include (but are not limited to):

* Performance optimization across node, job, cluster and site power bounds.
* Power/performance tradeoffs across accelerators, processors and DRAM.
* Cooling/performance tradeoffs.
* Translating budgetary bounds into power and energy bounds.
* Efficient system design, from computer center to silicon
* Effects of compiler optimizations on code power and energy efficiency
* Power- and energy-aware job schedulers, runtime systems and operating systems.
* Models of power and performance, from processors to computer centers.
* Evaluations of hardware power and energy controls

Important dates:

Full papers (10 pages max):
Deadline: Jan. 22nd
Automatic Extension: Jan. 29th
Author notification: Feb. 12th
Camera-ready copy: Feb. 26th

Short papers (4 pages max):
Deadline: Jan. 29th
Automatic Extension: Feb. 5th
Author notification: Feb. 19th
Camera-ready copy: Feb. 26th

All dates are AOE ("Anywhere on earth").

Paper submissions:
Submissions should follow the IEEE Conference Proceedings templates found
at http://www.ieee.org/conferences_events/conferences/publishing/templates.html
Camera-ready copy will need to conform to IPDPS guidelines; these will be
announced during author notification.

Workshop Co-Chairs:
Barry Rountree, LLNL  rountree at llnl.gov
Shuaiwen Leon Song, PNNL       shuaiwen.song at pnnl.gov

Webpage:  https://sites.google.com/site/hppac16/home

Shuaiwen Leon Song
Staff Research Scientist
High Performance Computing Group,
Advanced Computing, Mathematics, and Data Division,
Pacific Northwest National Lab (PNNL),
Washington, US,
Email: Shuaiwen.Song at pnnl.gov<mailto:Shuaiwen.Song at pnnl.gov>
HomePage: https://sites.google.com/site/shuaiwensongsresearch/

It is never too late to become what you might have been.       ^
-- George Elliot                                                                    ^

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