[hpc-announce] Co-HPC 2015 Call for Papers

[Shirley Moore]

*Call for Papers*



*Co-HPC 2015: Second International Workshop on Hardware-software Co-design
for High Performance Computing*

*http://codaash.org/co-hpc/* <http://codaash.org/co-hpc/>



To be held November 16, 2015 in Austin, Texas, in conjunction with SC’15
and in collaboration with ACM SIGHPC



Hardware-software co-design involves the concurrent design of hardware and
software components of complex computer systems, whereby application
requirements influence architecture design and hardware constraints
influence design of algorithms and software. High Performance Computing
(HPC) is facing a daunting challenges as we move towards the exascale era,
with the necessity of designing systems that run large-scale simulations
with high performance while meeting cost and energy consumption
constraints. The purpose of this workshop is to bring together researchers
who are investigating the interrelationships between
algorithms/applications, systems software, and hardware, and who are
developing methodologies and tools for hardware-software co-design for HPC.
We seek submissions that address various aspects of hardware-software
co-design and that demonstrate collaboration between domain scientists,
applied mathematicians, computer scientists, and hardware architects.  Last
year’s workshop was one of the best attended at SC’14, averaging over 80
attendees throughout the day, with attendees including academic, research
lab, and industry researchers and government program managers in the
hardware-software co-design area. This year’s workshop focuses especially
on hardware-software co-design for advanced architectures, including
systems with new low-power processor designs and new memory technologies.



Topics of interest to the workshop include, but are not limited, to the
following:

   - Use of simulation and emulation techniques for co-design
   - Modeling and prediction of performance and energy consumption
   - Co-optimization for multiple objectives (such as performance, power,
   resilience)
   - Evaluation of new processor and memory technologies for scientific
   applications
   - Mapping of algorithms and applications to heterogeneous systems



Submitted papers must be no more than 8 pages in length and must be in IEEE
Proceedings format. Use the templates available at
http://www.ieee.org/conferences_events/conferences/publishing/templates.html.
All submissions should be to the EasyChair submissions website at
https://www.easychair.org/conferences/?conf=cohpc2015.



*Keynote Speaker : Dr. Laura Carrington*

*Abstract:* The 64-bit ARMv8 platform has captured the attention of
system designers
across a number of computing domains, ranging from mobile and tablet
computing to large-scale cloud and HPC systems. This is evidenced by the
fact that ARM has sold over 50 licenses to the technology. Many in the HPC
community are convinced that energy efficient ARM designs, and the ARMv8
platform in particular due to its improved double-precision and SIMD
support over prior ARM designs, will figure prominently into the set of
solutions that allow continued expansion in the computational capabilities
of HPC systems and the scientific discoveries fueled by those capabilities. Dr.
Carrington will present her work on the performance and energy-efficiency
analysis of ARM processors for HPC workloads. The analysis includes
comparison of an early ARMv8 HPC platform to current architectures
including INTEL SandyBridge, Haswell, and ATOM.

*Bio:* Dr. Carrington is the Director of the Performance Modeling and
Characterization (PMaC) lab at San Diego Supercomputer Center and the Vice
President of Research for EP Analytics. Dr. Carrington is an expert in High
Performance Computing with publications in HPC benchmarking, workload
analysis, application performance analysis and optimization, analysis of
accelerators (i.e. FPGAs and GPUs) for scientific workloads, tools in
performance analysis (i.e. processor and network simulators), and
energy-efficient computing. She has presented numerous invited talks and
been a member of various panels and committees. She is the lead for the
energy efficiency thrust area for the DOE SciDAC-3 Institute for Sustained
Performance, Energy, and Resilience (SUPER).



*Journal Special Issue*

The authors of papers accepted to the Co-HPC 2015 workshop will be invited
to extend the manuscript for a special issue of Scientific Programming,
guest-edited by the Co-HPC 2015 workshop chairs. The target submission
deadline for the journal papers is January 15, 2016.  More details will be
posted to the Co-HPC 2015 website as they become available.



*Organizing Committee*

Shirley Moore, University of Texas at El Paso (Chair)

Laura Carrington, San Diego Supercomputer Center

Gregory Peterson, University of Tennessee

Richard Vuduc, Georgia Institute of Technology

Theresa Windus, Iowa State University



*Advisory Committee*

John Luginsland, Air Force Office of Scientific Research

Karen Pao, Department of Energy



*Program Committee*

Richard Barrett, Sandia National Laboratory

David Bernholdt, Oak Ridge National Laboratory

Alexandru Calotoiu, German School of Simulation Sciences

Eric Freudenthal, University of Texas at El Paso

Mark Gordon, Iowa State University

Christos Kartsaklis, Oak Ridge National Laboratory

Piotr Luszczek, University of Tennessee

Heike McCraw, University of Tennessee

Ramon Ravelo, University of Texas at El Paso

Lina Sawalha, Western Michigan University

Masha Sosonkina, Old Dominion University

Hiroyuki Takizawa, Tokohu University

Ananta Tiwari, San Diego Supercomputer Center

Vincent Weaver, University of Maine

Samuel Williams, Lawrence Berkeley Laboratory



*Important Dates*

Submission deadline:      August 15, 2015

Author notification:         September 15, 2015

Final paper due:                October 8, 2015
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