[hpc-announce] Second CFP ReConFig 2015 :: December 7-9 :: Mayan Riviera, Mexico

[René Cumplido]

CALL FOR PAPERS

¡Celebrating ReConFig's 10th Edition!

ReConFig 2015

2015 International Conference on ReConFigurable Computing and FPGA's
December 7-9, 2015, Mayan Riviera, Mexico.

www.reconfig.org

* 3 Keynote Speeches
* Technical Sessions (General Sessions + 8 Special Tracks)
* PhD Forum
* Demo Night
* Social Events

IEEE CASS Technical Co-sponsorship.

Conference Proceedings by the IEEE, to be included in IEEE Digital 
library (IEEE Xplore). Special Issues of International Journals.

Deadline for Submissions: July 17, 2015

********************************************************************

Call for Papers

It is our pleasure to invite you to participate in the 2015 
International Conference on Reconfigurable Computing and FPGAs (ReConFig 
2015) that will be held December 7-9, 2015 in
the Mayan Riviera, Mexico.

Reconfigurable computing and FPGA technology have become major subjects 
of research in computing and electrical engineering as they have been 
identified as powerful alternatives for creating highly efficient 
computing systems. Reconfigurable computing offers substantial 
performance improvements when compared against traditional processing 
architectures via custom design and reconfiguration capabilities. 
Reconfiguration is characterized by the ability of hardware 
architectures or devices to rapidly alter the functionalities of its 
components and the interconnection between them as needed. Existing 
theoretical models and algorithms combined with commercially available 
devices, such as FPGAs, make Reconfigurable Computing a very powerful 
computing paradigm.

Topics

ReConFig is one of the leading forums in the field that brings together 
an appropriate mix of all theoretical and practical aspects of 
reconfigurable computing and FPGA technology. The conference promotes 
the use of reconfigurable computing and FPGAs devices for research, 
education, and applications, covering from hardware architectures and 
devices to custom computers and high performance systems.

ReConFig covers a broad spectrum of topics including, but not limited to:

* Models, methods, tools, and architectures for reconfigurable computing
* Compilation, simulation, debugging, synthesis, verification, and test 
of reconfigurable systems
* Field programmable gate arrays and other reconfigurable technologies
* Evolvable hardware and dynamic reconfiguration
* Algorithms implemented on reconfigurable hardware
* Reconfigurable computing education
* Reconfigurable computing applications

In addition to the general session, submissions are invited for the 
following tracks:

* Coarse Grained Reconfigurable Computing: Architectures and Programming 
Models
* Cyber Physical Systems
* High Performance Reconfigurable Computing
* Multiprocessor Systems and Networks on Chip
* Productivity Environments and High Level Languages
* Reconfigurable Computing for DSP and Communications
* Reconfigurable Computing for Security and Cryptography
* Reconfiguration techniques
* Phd Forum


Demo Night
All attendees will be encouraged to bring their hardware/software for 
display at the ReConFig 2015 Demo Night.

Conference Proceedings
Conference Proceedings will be edited by the IEEE and will appear at 
IEEE Xplore Digital Library. Authors of selected papers will be invited 
to submit an extended version for a ReConFig’15 Special Issue of 
International Journals (TBC).

Submission information
Regular submissions should be no more than 6 pages long including 
tables, figures and references. They have to be submitted for evaluation 
as a PDF file using IEEE formatting.

Important Dates
Full Paper Submission: July 17, 2015
Acceptance Notification: September 18, 2015
Final paper submission: October 16, 2015
Conference: December 7-9, 2015


Organizing Committee

General Chair
René Cumplido, INAOE, Mexico

Program co-Chairs
Maya Gokhale, Lawrence Livermore National Laboratory, USA
Michael Huebner, Ruhr University Bochum, Germany

Proceedings Chair
Claudia Feregrino, INAOE, Mexico

Tracks co-Chairs
Hugo Andrade, National Instruments, USA
Peter Athanas, Virginia Tech, USA
Zain-ul-Abdin, Halmstad University, Sweden
Jason Bakos, University of South Carolina, USA
João Cardoso, University of Porto, Portugal
Eduardo de la Torre, Technical University of Madrid, Spain
Kris Gaj, George Mason University, USA
Diana Göhringer, Ruhr University Bochum, Germany
Tim Güneysu, Ruhr University Bochum, Germany
Sonia Lopez Alarcon, Rochester Institute of Technology, USA
Thilo Pionteck, University of Lübeck, Germany
Mario Porrmann, Bielefeld University, Germany
Marco Santambrogio, Politecnico di Milano, Italy
Andrew Schmidt, ISI/USC, USA
Hayden So, The University of Hong Kong, Hong Kong



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