[hpc-announce] CfP: 2nd Int. Workshop on High-Performance Stencil Computations (HiStencils 2015)

Armin Größlinger armin.groesslinger at uni-passau.de
Wed Sep 17 05:11:15 CDT 2014

*** Apologies if you receive multiple copies. ***
*** Please forward to interested colleagues.  ***

2nd Int. Workshop on High-Performance
Stencil Computations (HiStencils 2015)
Amsterdam, The Netherlands, January 20, 2015

in conjunction with HiPEAC 2015 (Jan 19-21, 2015)

Submission deadline: October  31, 2014
Author notification: November 28, 2014
Final version due:   December 12, 2014
Workshop:            January  20, 2015

Stencil computations are an important class of codes used in a variety
of application domains ranging from image and video processing to
simulation and computational science applied in several areas of
natural science. With consumer devices and high-end systems becoming
increasingly powerful, stencil computations are playing an
increasingly important role in research and in applications
alike. Today, real-world stencil codes are often hand-tuned which
requires a huge amount of engineering effort given the variety of
stencil codes in use. Therefore, simplifying the task of constructing
stencil codes that deliver high performance has become an important
topic in research.

HiStencils is a workshop focusing on stencil computations from
embedded environments to exascale computing and advanced software
technology needed to simplify the construction of stencils codes
delivering high performance. HiStencils is intended to bring together
researchers, students and practitioners dealing with, among others,
performance optimization, code generation and software technology for
stencil computations. We encourage submissions describing
preliminary results, new ideas, position papers, experience reports,
and available tools, with an aim to stimulate discussions,
collaborations, and advances in the field.

Topics of interest include, but are not limited to:
- performance optimization of stencil computations
- auto-tuning and machine learning for stencil codes
- software technology for stencil computations
- stencil code generation for GPUs, accelerators and distributed systems
- stencil applications in embedded systems
- hardware/high-level synthesis for stencil codes
- harnessing stencil computations for exascale performance
- static analysis and verification of stencil codes
- theoretical aspects of stencil computations
- multigrid stencil methods
- tool demonstration


Submissions should not exceed 8 pages (recommended 6 pages) formatted
as per ACM proceedings format. Please use the "tighter alternate
style" (option 2) available from

Submissions should be in PDF format and printable on US Letter or A4
sized paper. Proceedings will be published online and distributed to
the participants.  Please send your submission by the deadline to
histencils at exastencils.org.

HiStencils does not require copyright assignment, i.e., authors are
free to republish their work elsewhere. (Please note that other
venues may accept unpublished work only; being accepted for
HiStencils may be regarded as being "published".)


Organizers and Program Chairs:
Armin Groesslinger (Universitaet Passau, DE)
Harald Koestler (FAU Erlangen-Nuernberg, DE)
Contact: histencils at exastencils.org

Program Committee:
Carlo Bertolli (IBM, US)
Matthias Bolten (Bergische Universitaet Wuppertal, DE)
Rezaul Chowdhury (Stony Brook University, US)
Mike Clark (NVIDIA, US)
Matthias Christen (Universita della Svizzera Italiana, CH)
Francisco Gaspar (Universidad de Zaragoza, ES)
Dominik Goeddeke (TU Dortmund, DE)
Frank Hannig (FAU Erlangen-Nuernberg, DE)
Bradley C. Kuszmaul (MIT, US)
Hatem Ltaief (KAUST, SA)
Istvan Reguly (University of Oxford, GB)
Rochus Schmid (Ruhr-Universitaet Bochum, DE)
Jan Treibig (FAU Erlangen-Nuernberg, DE)

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